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參數(shù)資料
型號： AD9630AR-REEL
廠商： ANALOG DEVICES INC
元件分類： 運(yùn)動控制電子
英文描述： ECONOLINE: REC3-S_DRW(Z)/H4,H6 - Safety standards and approval: EN 60950 certified, rated for 250VAV (LVD test report)- Applied for Ul 1950 Component Recognised Certification- 3W DIP Package- 4kVDC & 6kVDC Isolation- Regulated Output- Continuous Short Circiut Protection Auto-Restarting
中文描述： BUFFER AMPLIFIER, PDSO8
封裝： SOIC-8
文件頁數(shù)： 2/7頁
文件大小： 101K
代理商： AD9630AR-REEL
–2–
REV. B
AD9630–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(unless otherwise noted,
6
V
S
=
6
5 V; R
IN
= 50
V
, R
LOAD
= 100
V
)
Test
Level
Min
AD9630AN/AR
Typ
Parameter
DC SPECIFICATIONS
Output Offset Voltage
Offset Voltage TC
Input Bias Current
Bias Current TC
Input Resistance
Conditions
Temp
Max
Units
+25
°
C
Full
+25
°
C
Full
+25 to T
MAX
T
MIN
+25
°
C
+25 to T
MAX
T
MIN
Full
+25 to T
MAX
T
MIN
+25
°
C
Full
+25
°
C
I
IV
I
IV
II
VI
V
II
VI
VI
II
VI
V
VI
V
–8
–40
–25
–100
300
150
±
3
±
8
±
2
±
20
450
250
1.0
0.990
0.985
±
3.6
+8
+40
+25
+100
mV
μ
V/
°
C
μ
A
nA/
°
C
k
k
pF
V/V
V/V
V
mA
mA
dB
%
Input Capacitance
Gain
V
OUT
= 2 V p-p
V
OUT
= 2 V p-p
0.983
0.980
+3.2
50
40
Output Voltage Range
Output Current (50
Load)
–3.2
Output Impedance
PSRR
DC Nonlinearity
FREQUENCY DOMAIN
Bandwidth (–3 dB)
Small Signal
At DC
V
S
=
±
5%
±
2 V Full Scale
0.6
55
0.03
44
V
O
≤
0.7 V p-p
V
O
≤
0.7 V p-p
V
O
= 5 V p-p
V
O
= 5 V p-p
≤
200 MHz
≤
200 MHz
DC to 150 MHz
DC to 150 MHz
2 V p-p; 4.3 MHz
2 V p-p; 20 MHz
2 V p-p; 50 MHz
2 V p-p; 4.3 MHz
2 V p-p; 20 MHz
2 V p-p; 50 MHz
2 V p-p; 50 MHz
10 MHz
100 kHz – 200 MHz
T
MIN
to +25
T
MAX
T
MIN
to +25
T
MAX
Full
Full
+25
°
C
+25
°
C
Full
Full
Full
Full
Full
T
MIN
to +25
T
MAX
+25
°
C
+25
°
C
II
II
V
V
II
II
V
V
IV
IV
II
IV
IV
II
II
V
V
400
330
750
550
120
105
0.4
0
0.7
0.7
–80
–66
–52
–86
–75
–47
–46
2.4
32
MHz
MHz
MHz
MHz
dB
dB
ns
Degrees
dBc
dBc
dBc
dBc
dBc
dBc
dBc
nV/
√
Hz
μ
V
Large Signal
Output Peaking
Output Rolloff
Group Delay
Linear Phase Deviation
2nd Harmonic Distortion
1.2
0.3
–73
–58
–43
–79
–68
–41
–40
3rd Harmonic Distortion
Spectral Input Noise Voltage
Integrated Output Noise
TIME DOMAIN
Slew Rate
Rise/Fall Time
V
OUT
= 5 V Step
V
OUT
= 1 V Step
V
OUT
= 1 V Step
V
OUT
= 5 V Step
V
OUT
= 5 V Step
V
OUT
= 2 V Step
+25
°
C
+25
°
C
T
MIN
to T
MAX
+25
°
C
T
MIN
to T
MAX
Full
IV
IV
IV
IV
IV
IV
700
1200
1.1
1.3
4.2
5.0
2
V/
μ
s
ns
ns
ns
ns
%
1.7
1.9
5.7
6.5
12
Overshoot Amplitude
Settling Time
To 0.1%
V
OUT
= 2 V Step
V
OUT
= 2 V Step
V
OUT
= 2 V Step
V
OUT
= 2 V Step
4.4 MHz
4.4 MHz
T
MIN
to +25
T
MAX
T
MIN
to +25
T
MAX
+25
°
C
+25
°
C
IV
IV
IV
V
V
V
6
7
8
12
0.015
0.025
10
12
ns
ns
ns
ns
%
Degree
To 0.02%
4
Differential Gain
Differential Phase
SUPPLY CURRENTS
V
CC
(+I
S
)
V
EE
(–I
S
)
V
CC
= +5 V
V
EE
= –5 V
Full
Full
II
II
19
19
26
26
mA
mA
NOTES
1
Short-term settling with 50
source impedance.
Specifications subject to change without notice.
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