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參數(shù)資料
| 型號： | AD9709AST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | RES 0.01 OHM MAX 25 AMP AXIAL |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 16/27頁 |
| 文件大?。?/td> | 466K |
| 代理商： | AD9709AST |
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REV. 0
AD9709
–16–
APPLICATIONS
Using the AD9709 for Quadrature Amplitude Modulation
QAM is one of the most widely used digital modulation schemes
in digital communications systems. This modulation technique
can be found in FDM as well as spread spectrum (i.e., CDMA)
based systems. A QAM signal is a carrier frequency that is
modulated in both amplitude (i.e., AM modulation) and phase
(i.e., PM modulation). It can be generated by independently
modulating two carriers of identical frequency but with a 90
°
phase difference. This results in an in-phase (I) carrier compo-
nent and a quadrature (Q) carrier component at a 90
°
phase
shift with respect to the I component. The I and Q components
are then summed to provide a QAM signal at the specified car-
rier frequency.
Σ
DAC
CARRIER
FREQUENCY
8
8
TO
MIXER
NYQUIST
FILTERS
QUADRATURE
MODULATOR
DAC
DSP
OR
ASIC
0
90
Figure 40. Typical Analog QAM Architecture
A common and traditional implementation of a QAM modula-
tor is shown in Figure 40. The modulation is performed in the
analog domain in which two DACs are used to generate the
baseband I and Q components. Each component is then typically
applied to a Nyquist filter before being applied to a quadrature
mixer. The matching Nyquist filters shape and limit each com-
ponents spectral envelope while minimizing intersymbol inter-
ference. The DAC is typically updated at the QAM symbol rate
or possibly a multiple of it if an interpolating filter precedes
the DAC. The use of an interpolating filter typically eases the
implementation and complexity of the analog filter, which can
be a significant contributor to mismatches in gain and phase
between the two baseband channels. A quadrature mixer modu-
lates the I and Q components with the in-phase and quadrature
carrier frequency and then sums the two outputs to provide the
QAM signal.
In this implementation, it is much more difficult to maintain
proper gain and phase matching between the I and Q channels.
The circuit implementation shown in Figure 41 helps improve
upon the matching between the I and Q channels, as well as
showing a path for up-conversion using the AD8346 quadrature
modulator. The AD9709 provides both I and Q DACs as well as
a common reference that will improve the gain matching and
stability. R
CAL
can be used to compensate for any mismatch in
gain between the two channels. The mismatch may be attributed
to the mismatch between R
SET1
and R
SET2
, effective load resis-
tance of each channel, and/or the voltage offset of the control
amplifier in each DAC. The differential voltage outputs of both
DACs in the AD9709 are fed into the respective differential
inputs of the AD8346 via matching networks.
I and Q digital data can be fed into the AD9709 in two different
ways. In dual port mode, The digital I information drives one
input port, while the digital Q information drives the other input
port. If no interpolation filter precedes the DAC, the symbol
rate will be the rate at which the system clock drives the CLK
and WRT pins on the AD9709. In interleaved mode, the digital
input stream at Port I contains the I and the Q information in
alternating digital words. Using IQSEL and IQRESET, the
AD9709 can be synchronized to the I and Q data stream. The
internal timing of the AD9709 routes the selected I and Q data
to the correct DAC output. In interleaved mode, if no inter-
polation filter precedes the AD9709, the symbol rate will be
half that of the system clock driving the digital datastream and
the IQWRT and IQCLK pins on the AD9709.
IOUTA
IOUTB
QOUTA
QOUTB
RB
RA
V
MOD
AVDD
RL
AD8346
AD976x
0 TO I
OUTFS
V
DAC
DCOM
FSADJI
REFIO
SLEEP
R
SET
3.9k
0.1 F
DVDD
AVDD
CA
0.1 F
VPBF
BBIP
BBIN
BBQP
BBQN
AD8346
LOIP
LOIN
VOUT
IQWRT
IQCLK
ACOM
AD9709
“
I
”
DAC
RL
LA
RL
CB
LA
RL
RB
RB
RL
RA
RA
AVDD
RL
CA
RL
LA
RL
CB
LA
RB
RB
RL
RA
RA
C
FILTER
DRLC FILTER
VDIFF = 1.82V p-p
“
Q
”
LDAC
PHASE
SPLITTER
ROHDE &
FSEA30B
SPECTRUM
ANALYZER
ROHDE &
SCHWARZ
SIGNAL
GENERATOR
PORT I
PORT Q
TEKTRONICS
AWG2021
D
I
G
I
T
A
L
I
N
T
E
R
F
A
C
E
IQSEL
FSADJQ
R
SET
3.9k
MODE
CB = 45pF
LA = 10 H
I
= 11mA
AVDD = 5.0V
VCM = 1.2V
NOTE:
RL = 200
RA = 2500
RB = 500
RP = 200
CA = 280pF
“
Q
”
DAC
“
I
”
LDAC
NOTE: DACs Full-Scale OUTPUT CURRENT = I
RA, RB AND RL ARE THIN FILM RESISTOR NETWORKSWITH
0.1% MATCHING, 1% ACCURACY.
AVAILABLE FROM OHMTEK ORNXXXXD SERIES.
Figure 41. Baseband QAM Implementation Using an AD9709 and AD8346
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9709ASTRL | 制造商:Analog Devices 功能描述:DAC 2-CH Segment 8-bit 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:8-BIT 125 MSPS DUAL TXDAC+ D/A CONVERTER - Tape and Reel |
| AD9709ASTZ | 功能描述:IC DAC 8BIT DUAL 125MSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD9709ASTZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Bit, 125 MSPS, Dual TxDAC Digital-to-Analog Converter |
| AD9709ASTZKL1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9709ASTZRL | 功能描述:IC DAC 8BIT DUAL 125MSPS 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標準包裝:91 系列:- 設(shè)置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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