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參數(shù)資料
| 型號(hào)： | AD9709AST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | RES 0.01 OHM MAX 25 AMP AXIAL |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 9/27頁 |
| 文件大小： | 466K |
| 代理商： | AD9709AST |
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REV. 0
AD9709
–9–
FUNCTIONAL DESCRIPTION
Figure 20 shows a simplified block diagram of the AD9709.
The AD9709 consists of two DACs, each one with its own
independent digital control logic and full-scale output current
control. Each DAC contains a PMOS current source array
capable of providing up to 20 mA of full-scale current (I
OUTFS
).
The array is divided into 31 equal currents that make up the five
most significant bits (MSBs). The three lower bits consist of
seven equal current sources whose value is 1/8th of an MSB
current source. Implementing the lower bits with current sources,
instead of an R-2R ladder, enhances the dynamic performance
for multitone or low-amplitude signals and helps maintain the
DACs high-output impedance (i.e., >100 k
).
All of these current sources are switched to one or the other of
the two output nodes (i.e., I
OUTA
or I
OUTB
) via PMOS differ-
ential current switches. The switches are based on a new archi-
tecture that drastically improves distortion performance. This
new switch architecture reduces various timing errors and pro-
vides matching complementary drive signals to the inputs of the
differential current switches.
The analog and digital sections of the AD9709 have separate
power supply inputs (i.e., AVDD and DVDD) that can operate
independently over a 3 V to 5.5 V range. The digital section,
which is capable of operating up to a 125 MSPS clock rate,
consists of edge-triggered latches and segment decoding logic
circuitry. The analog section includes the PMOS current sources,
the associated differential switches, a 1.20 V bandgap voltage
reference and two reference control amplifiers.
The full-scale output current of each DAC is regulated by sepa-
rate reference control amplifiers and can be set from 2 mA to
20 mA via an external resistor, R
SET
, connected to the Full-Scale
Adjust (FSADJ) pin. The external resistor, in combination with
both the reference control amplifier and voltage reference V
REFIO
,
sets the reference current I
REF
, which is replicated to the seg-
mented current sources with the proper scaling factor. The full-
scale current, I
OUTFS
, is 32
×
I
REF
.
REFERENCE OPERATION
The AD9709 contains an internal 1.20 V bandgap reference.
This can be easily overridden by an external reference with no
effect on performance. REFIO serves as either an
input
or
output
depending on whether the internal or an external reference is
used. To use the internal reference, simply decouple the REFIO
pin to ACOM with a 0.1
μ
F capacitor. The internal reference
voltage will be present at REFIO. If the voltage at REFIO is to
be used elsewhere in the circuit, an external buffer amplifier
with an input bias current of less than 100 nA should be used.
An example of the use of the internal reference is shown in
Figure 21.
An external reference can be applied to REFIO as shown in
Figure 22. The external reference may provide either a fixed
reference voltage to enhance accuracy and drift performance or
a varying reference voltage for gain control. Note that the 0.1
μ
F
compensation capacitor is not required since the internal refer-
ence is overridden, and the relatively high-input impedance of
REFIO minimizes any loading of the external reference.
GAINCTRL MODE
The AD9709 allows the gain of each channel to be set indepen-
dently by connecting one R
SET
resistor to FSADJ1 and another
R
SET
resistor to FSADJ2. To add flexibility and reduce system
cost, a single R
SET
resistor can be used to set the gain of both
channels simultaneously.
When GAINCTRL is low (i.e., connected to AGND), the inde-
pendent channel gain control mode using two resistors is enabled.
In this mode, individual R
SET
resistors should be connected to
FSADJ1 and FSADJ2. When GAINCTRL is high (i.e., connected
to AVDD), the master/slave channel gain control mode using one
resistor is enabled. In this mode, a single RSET resistor is con-
nected to FSADJ1 and the resistor on FSADJ2 can be removed.
DIGITAL DATA INPUTS
I
REF1
I
REF2
AVDD
DB0-DB7
GAINCTRL
WRT1/
IQWRT
1.2V REF
R
SET
2
CHANNEL 1 LATCH
CHANNEL 2 LATCH
PMOS
CURRENT
SOURCE
ARRAY
PMOS
CURRENT
SOURCE
ARRAY
SEGMENTED
SWITCHES
FOR DAC1
SEGMENTED
SWITCHES
FOR DAC2
LSB
SWITCH
LSB
SWITCH
MULTIPLEXING LOGIC
AD9709
DCOM
MODE
SLEEP
CLK2/
IQRESET
CLK1/
IQCLK
5V
FSADJ1
R
SET
1
REFIO
0.1 F
FSADJ2
DB0-DB7
WRT2/
IQSEL
5V
DVDD
DAC2
LATCH
DAC1
LATCH
CLK
DIVIDER
ACOM
I
OUTA1
I
OUTB1
R
L
1A
50
V
OUT
1A
R
L
1B
50
V
OUT
1B
R
L
2A
50
V
OUT
2A
R
L
2B
50
V
OUT
2B
I
OUTA2
I
OUTB2
V
DIFF
= V
OUT
A
–
V
OUT
B
Figure 20. Simplified Block Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9709ASTRL | 制造商:Analog Devices 功能描述:DAC 2-CH Segment 8-bit 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:8-BIT 125 MSPS DUAL TXDAC+ D/A CONVERTER - Tape and Reel |
| AD9709ASTZ | 功能描述:IC DAC 8BIT DUAL 125MSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD9709ASTZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Bit, 125 MSPS, Dual TxDAC Digital-to-Analog Converter |
| AD9709ASTZKL1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9709ASTZRL | 功能描述:IC DAC 8BIT DUAL 125MSPS 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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