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參數資料
| 型號： | AD9807JS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal Processors |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數： | 6/24頁 |
| 文件大小： | 240K |
| 代理商： | AD9807JS |
AD9807/AD9805
–6–
REV. 0
PIN CONFIGURAT ION
1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
12
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
64 63 62 61 60
55 54 53 52 51 50 49
59 58 57 56
PIN 1
(TOP VIEW
G
G
G
N
G
G
G
G
G
G
G
D
D
A
A
AVDD
AVSS
CAPT
CAPT
CAPB
CAPB
VREF
CML
VINR
AVSS
VING
AVSS
VINB
AVSS
AVDD
STRTLN
A0
DOUT<9>
DOUT<8>
DOUT<7>
DOUT<6>
DOUT<5>/MPU<7>
DOUT<4>/MPU<6>
DRVDD
DRVSS
DOUT<3>/MPU<5>
DOUT<2>/MPU<4>
DOUT<1>/MPU<3>
DOUT<0>/MPU<2>
MPU<1>
MPU<0>
OEB
C
C
A
O
O
O
O
O
O
O
D
D
C
R
W
O
AD9805
N
NC = NO CONNECT
PIN DE SCRIPT IONS
Pin No.
1, 15
2, 10, 12, 14
3, 4
5, 6
7
8
9
11
13
16
17
18
19
28, 52
29, 51
20
21–26
27
30
31
32
33
34
35
36
37–39, 42
40
41
43
44–46
47
48, 49, 50
53, 54
55
56–63
64
T YPE: AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; DIO = Digital Input/Output; P = Power.
Pin Name
AVDD
AVSS
CAPT
CAPB
VREF
CML
VINR
VING
VINB
ST RT LN
CDSCLK 1
CDSCLK 2
ADCCLK
DVSS
DVDD
OFFSET <7>
OFFSET <6:1>
OFFSET <0>
CSB
RDB
WRB
OEB
MPU<0>
MPU<1>
DOUT <0>/MPU<2>
DOUT <1:4>/MPU<3:6>
DRVSS
DRVDD
DOUT <5>/MPU<7>
DOUT <6:8>
DOUT <9>
A0, A1, A2
NC
GAIN<0>
GAIN<1:8>
GAIN<9>
T ype
P
P
AO
AO
AO
AO
AI
AI
AI
DI
DI
DI
DI
P
P
DI
DI
DI
DI
DI
DI
DI
DIO
DIO
DIO
DIO
P
P
DIO
DO
DO
DI
Description
+5 V Analog Supply.
Analog Ground.
Reference Decoupling. See Figure 22.
Reference Decoupling.
Internal Reference Output. Decouple with 10
μ
F + 0.1
μ
F.
Internal Bias Voltage. Decouple with 0.1
μ
F.
Analog Input, Red.
Analog Input, Green.
Analog Input, Blue.
ST RT LN. Indicates beginning of scan line.
CDS Reset Clock Pulse Input.
CDS Data Clock Pulse Input.
A/D Sample Clock Input.
Digital Ground.
+5 V Digital Supply.
Pixel Rate Offset Coefficient Inputs. Most Significant Bit.
Pixel Rate Offset Coefficient Inputs.
Pixel Rate Offset Coefficient Inputs. Least Significant Bit.
Chip Select. Active Low.
Read Strobe. Active Low.
Write Strobe. Active Low.
Output Enable. Active Low.
Register Input-Output LSB.
Register Input-Output.
Data Output LSB/Register Input-Output.
Data Output/Register Input-Output.
Digital Driver Ground.
Digital Driver Supply.
Data Output/Register Input-Output MSB.
Data Outputs.
Data Output MSB.
Register Select Pins.
No Connection.
Pixel Rate Gain Coefficient Input LSB.
Pixel Rate Gain Coefficient Inputs.
Pixel Rate Gain Coefficient Input MSB.
DI
DI
DI
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相關代理商/技術參數 |
參數描述 |
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