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參數資料
| 型號： | AD9822JR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Complete 14-Bit CCD/CIS Signal Processor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| 封裝： | 0.300 INCH, SOIC-28 |
| 文件頁數： | 14/15頁 |
| 文件大小： | 150K |
| 代理商： | AD9822JR |
REV. A
AD9822
–14–
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD9822
CDSCLK1
AVDD
CDSCLK2
ADCCLK
OEB
DRVDD
DRVSS
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0 (LSB)
AVSS
VINR
OFFSET
VING
CML
VINB
CAPT
CAPB
AVSS
AVDD
SLOAD
SCLK
SDATA
3
CLOCK INPUTS
8
DATA OUTPUTS
0.1
m
F
3
SERIAL INTERFACE
0.1
m
F
5V/3V
5V
0.1
m
F
0.1
m
F
0.1
m
F
0.1
m
F
RED INPUT
GREEN INPUT
BLUE INPUT
0.1
m
F
0.1
m
F
1.0
m
F
10
m
F
0.1
m
F
+
0.1
m
F
5V
0.1
m
F
Figure 14. Recommended Circuit Configuration, 3-Channel CDS Mode
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD9822
CDSCLK1
AVDD
CDSCLK2
ADCCLK
OEB
DRVDD
DRVSS
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0 (LSB)
AVSS
VINR
OFFSET
VING
CML
VINB
CAPT
CAPB
AVSS
AVDD
SLOAD
SCLK
SDATA
3
CLOCK INPUTS
8
DATA OUTPUTS
0.1
m
F
3
SERIAL INTERFACE
0.1
m
F
5V/3V
5V
0.1
m
F
RED INPUT
GREEN INPUT
BLUE INPUT
0.1
m
F
10
m
F
0.1
m
F
+
0.1
m
F
5V
0.1
m
F
Figure 15. Recommended Circuit Configuration, 3-Channel SHA Mode
(Analog Inputs Sampled with Respect to Ground)
APPLICATIONS INFORMATION
Circuit and Layout Recommendations
The recommended circuit configuration for 3-Channel CDS
mode operation is shown in Figure 14. The recommended input
coupling capacitor value is 0.1
μ
F (see Circuit Operation section
for more details). A single ground plane is recommended for the
AD9822. A separate power supply may be used for DRVDD,
the digital driver supply, but this supply pin should still be
decoupled to the same ground plane as the rest of the AD9822.
The loading of the digital outputs should be minimized, either
by using short traces to the digital ASIC, or by using external
digital buffers. To minimize the effect of digital transients during
major output code transitions, the falling edge of CDSCLK2
should occur coincident with or before the rising edge of
ADCCLK (see Figures 1 through 4 for timing). All 0.1
μ
F
decoupling capacitors should be located as close as possible to
the AD9822 pins. When operating in single channel mode, the
unused analog inputs should be grounded.
Figure 15 shows the recommended circuit configuration for 3-
Channel SHA mode. All of the above considerations also apply
for this configuration, except that the analog input signals are
directly connected to the AD9822 without the use of coupling
capacitors. The analog input signals must already be dc-biased
between 0 V and 2 V (see the Circuit Operation section for
more details).
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9822JRRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 14-Bit 5V 28-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:14 BIT AFE WITH 12 BIT LINEARITY - Bulk |
| AD9822JRS | 制造商:Analog Devices 功能描述:AFE Video 1ADC 14-Bit 5V 28-Pin SSOP |
| AD9822JRSRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 14-Bit 5V 28-Pin SSOP T/R 制造商:Rochester Electronics LLC 功能描述:14 BIT AFE WITH 12 BIT LINEARITY - Bulk |
| AD9822JRSZ | 功能描述:IC CCD SIGNAL PROC 14BIT 28SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9822JRSZRL | 功能描述:IC CCD SIGNAL PROC 14BIT 28SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
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