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參數(shù)資料
| 型號： | AD9844AJST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Complete 12-Bit 20 MSPS CCD Signal Processor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 169K |
| 代理商： | AD9844AJST |
AD9844A
–11–
REV. 0
Table II. Operation Register Contents (Default Value x000)
Optical Black Clamp
D5
Reset
D4
Power-Down Modes
D3 D2
Channel Selection
D1 D0
D10
D9
D8
D7
D6
0
*
0
*
0
*
1
**
0
*
0
1
Enable Clamping
Disable
Clamping
0 Normal
1 Reset All
Registers
to Default
0
0
1
1
0 Normal Power
1 Fast Recovery
0 Standby
1 Total Power-Down 1
0
0
1
0
1
0
1
CCD-Mode
AUX1-Mode
AUX2-Mode
Test Only
*
Must be set to zero.
**
Set to one.
Table III. VGA Gain Register Contents (Default Value x096)
MSB
D9
LSB
D0
D10
D8
D7
D6
D5
D4
D3
D2
D1
Gain (dB)
X
0
0
0
1
0
1
1
1
1
1
1
1
2.0
35.965
36.0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
Table IV. Clamp Level Register Contents (Default Value x080)
MSB
D7
LSB
D0
D10
D9
D8
D6
D5
D4
D3
D2
D1
Clamp Level (LSB)
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
0
1
0
0
1
2
254
255
1
1
1
1
1
1
1
1
1
1
1
1
0
1
Table V. Control Register Contents (Default Value x000)
Data Out
D9
DATACLK
D6
CLP/PBLK
D5
SHP/SHD
D4
CDS Gain
D3
D10
D8
D7
D2
D1
D0
X
0 Enable
1 Three-State
0
*
0
*
0 Rising Edge Trigger
1 Falling Edge Trigger
0 Active Low
1 Active High
0 Active Low
1 Active High
0 Disabled
**
1 Enabled
0
*
0
*
0
*
*
Must be set to zero.
**
When D3 = 0 (CDS Gain Disabled), the CDS Gain Register is fixed at –4 dB (Code 63 dec).
Table VI. CDS Gain Register Contents (Default Value x000)
MSB
D5
LSB
D0
D10
D9
D8
D7
D6
D4
D3
D2
D1
Gain (dB)
*
X
X
X
X
X
0
0
0
1
0
1
0
0
0
+4.3
+10.0
–2.0
+4.0
0
1
1
0
1
0
1
0
0
0
1
1
1
1
1
*
Control Register Bit D3 must be set high for the CDS Gain Register to be used.
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| AD9845B | Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9845BJST | Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9845 | Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9845A | Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9845AJST | Complete 12-Bit 30 MSPS CCD Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9844AJSTRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3.3V 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:AFE VID 1ADC 12-BIT 3.3V 48LQFP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:12 BIT 20 MHZ ANALOG FRONT END - Tape and Reel |
| AD9844AJSTZ | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3.3V 48-Pin LQFP 制造商:Analog Devices 功能描述:12 BIT 20 MHz ANALOG FRONT END |
| AD9844-EB | 制造商:Analog Devices 功能描述: |
| AD9845 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9845A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 30 MSPS CCD Signal Processor |
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