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參數(shù)資料
| 型號(hào)： | AD9845AJST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Complete 12-Bit 30 MSPS CCD Signal Processor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC , LQFP-48 |
| 文件頁(yè)數(shù)： | 10/22頁(yè) |
| 文件大小： | 252K |
| 代理商： | AD9845AJST |
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REV. 0
AD9845A
–10–
PIXEL GAIN AMPLIFIER (
PxGA
) TIMING
FRAME n
LINE 0
LINE 1
LINE 2
LINE m
0101...
2323...
0101...
LINE m
–
1
LINE 0
LINE 1
LINE 2
LINE m
0101...
2323...
0101...
LINE m
–
1
NOTE: 0 = GAIN0, 1 = GAIN1, 2 = GAIN2, 3 = GAIN3
FRAME n+1
VD
HD
Figure 8. PxGA Mode 1 (Mosaic Separate) Frame/Line Gain Register Sequence
SHP
HD
3ns MIN
3ns MIN
PxGA
GAIN
GAIN0
GAIN1
GAIN0
GAIN3
GAIN2
GAINX
GAINX
VD
NOTES:
1. MINIMUM PULSEWIDTH FOR HD AND VD IS 5 PIXEL CYCLES.
2. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES. MINIMUM SET-UP TIME IS 3ns.
3. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING EDGE WILL RESET TO 0101.
4. EVERY HD RISING EDGE WITHOUT A PREVIOUS VD RISING EDGE WILL ALTERNATE BETWEEN 0101... AND 2323.
5 PIXEL MIN
Figure 9. PxGA Mode 1 (Mosaic Separate) Detailed Timing
0101...
2323...
0101...
0101...
2323...
0101...
HD
LINE 0
LINE 1
LINE 2
LINE m
LINE m
–
1
LINE 0
LINE 1
LINE 2
LINE m
LINE m
–
1
EVEN FIELD
ODD FIELD
NOTE: 0 = GAIN0, 1 = GAIN1, 2 = GAIN2, 3 = GAIN3
VD
Figure 10. PxGA Mode 2 (Interlace) Frame/Line Gain Register Sequence
SHP
HD
PxGA
GAIN
GAIN0
GAIN1
GAIN0
GAIN3
GAIN2
GAINX
GAINX
3ns MIN
3ns MIN
5 PIXEL MIN
VD
NOTES:
1. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES.
2. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING OR FALLING EDGE WILL RESET TO 0101.
3. EVERY HD RISING EDGE WITHOUT A PREVIOUS VD RISING EDGE WILL ALTERNATE BETWEEN 0101... AND 2323.
Figure 11. PxGA Mode 2 (Interlace) Detailed Timing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9846A | Complete 10-Bit 30 MSPS CCD Signal Processor |
| AD9846AJST | Complete 10-Bit 30 MSPS CCD Signal Processor |
| AD9847 | 10-Bit 40 MSPS CCD Signal Processor with Integrated Timing Driver |
| AD9847AKST | 10-Bit 40 MSPS CCD Signal Processor with Integrated Timing Driver |
| AD9848KST | CCD Signal Processors with Integrated Timing Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9845AJSTRL | 制造商:Analog Devices 功能描述:CCD Signal Processor 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:CCD SGNL PROCESSOR 48LQFP - Tape and Reel |
| AD9845B | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 30 MSPS CCD Signal Processor |
| AD9845BJST | 制造商:Analog Devices 功能描述:CCD SGNL PROCESSOR 48LQFP - Trays 制造商:Rochester Electronics LLC 功能描述: |
| AD9845BJSTRL | 制造商:Analog Devices 功能描述:CCD SGNL PROCESSOR 48LQFP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:12 BIT 30MHZ AFE NO PXGA - Tape and Reel |
| AD9845BJSTZ | 功能描述:IC CCD SIGNAL PROC 12BIT 48-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
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