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參數資料
| 型號： | AD9882KST-140 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Dual Interface for Flat Panel Displays |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, MS-026BED, LQFP-100 |
| 文件頁數： | 31/36頁 |
| 文件大小： | 370K |
| 代理商： | AD9882KST-140 |
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REV. A
AD9882
–31–
2-WIRE SERIAL CONTROL PORT
A 2-wire serial control interface is provided. Two AD9882
devices may be connected to the 2-wire serial interface, with each
device having a unique address.
The 2-wire serial interface comprises a clock (SCL) and a
bidirectional data (SDA) pin. The analog flat panel interface
acts as a slave for receiving and transmitting data over the serial
interface. When the serial interface is not active, the logic levels
on SCL and SDA are pulled HIGH by external pull-up resistors.
Data received or transmitted on the SDA line must be stable for
the duration of the positive-going SCL pulse. Data on SDA must
change only when SCL is LOW. If SDA changes state while SCL
is HIGH, the serial interface interprets that action as a start or
stop sequence.
There are five components to serial bus operation:
∑
Start signal
∑
Slave address byte
∑
Base register address byte
∑
Data byte to read or write
∑
Stop signal
When the serial interface is inactive (SCL and SDA are HIGH),
communications are initiated by sending a start signal. The start
signal is a HIGH-to-LOW transition on SDA while SCL is HIGH.
This signal alerts all slaved devices that a data transfer sequence
is coming.
The first eight bits of data transferred after a start signal com-
prise a 7-bit slave address (the first seven bits) and a single
R/
W
bit (the eighth bit). The R/
W
bit indicates the direction of
data transfer: read from (1) or write to (0) the slave device. If the
transmitted slave address matches the address of the device (set
by the state of the SA input pin in Table XLVIII), the AD9882
acknowledges by bringing SDA LOW on the ninth SCL pulse.
If the addresses do not match, the AD9882 does not acknowledge.
Table XLVIII. Serial Port Addresses
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
A6
(MSB)
A5
A4
A3
A2
A1
A0
(LSB)
1
1
0
0
0
0
1
1
1
1
0
0
0
1
Data Transfer via Serial Interface
For each byte of data read or written, the MSB is the first bit of
the sequence.
If the AD9882 does not acknowledge the master device during a
write sequence, the SDA remains HIGH so the master can gener-
ate a stop signal. If the master device does not acknowledge the
AD9882 during a read sequence, the AD9882 interprets this
as
“
end of data.
”
The SDA remains HIGH so the master can
generate a stop signal.
Writing data to specific control registers of the AD9882 requires
that the 8-bit address of the control register of interest be written
after the slave address has been established. This control regis-
ter address is the base address for subsequent write operations.
The base address autoincrements by one for each byte of data
written after the data byte intended for the base address. If there
are more bytes transferred than there are available addresses, the
address will not increment and will remain at its maximum value
of 1Eh. Any base address higher than 1Eh will not produce an
acknowledge signal.
Data are read from the control registers of the AD9882 in a
similar manner. Reading requires two data transfer operations:
The base address must be written with the R/
W
bit of the slave
address byte LOW to set up a sequential read operation.
Reading (the R/
W
bit of the slave address byte HIGH) begins at
the previously established base address. The address of the read
register autoincrements after each byte is transferred.
To terminate a read/write sequence to the AD9882, a stop signal
must be sent. A stop signal comprises a LOW-to-HIGH transition
of SDA while SCL is HIGH. The timing for the read/write is
shown in Figure 16, and a typical byte transfer is shown in
Figure 17.
A repeated start signal occurs when the master device driving the
serial interface generates a start signal without first generating a
stop signal to terminate the current communication. This is used
to change the mode of communication (read, write) between the
slave and master without releasing the serial interface lines.
t
BUFF
t
STAH
t
DHO
t
DAL
t
DAH
t
DSU
t
STASU
t
STOSU
SDA
SCL
Figure 16. Serial Port Read/Write Timing
相關PDF資料 |
PDF描述 |
|---|---|
| AD9882 | Dual Interface for Flat Panel Displays |
| AD9883ABST-RL140 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9883AKST-110 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9883AKST-140 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9883A | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9882KSTZ-100 | 功能描述:IC INTERFACE/DVI 100MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產品:NXP - I2C Interface 標準包裝:1 系列:- 應用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9882KSTZ-140 | 功能描述:IC INTERFACE/DVI 100MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產品:NXP - I2C Interface 標準包裝:1 系列:- 應用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9883 | 制造商:AD 制造商全稱:Analog Devices 功能描述:110 MSPS Analog Interface for Flat Panel Displays |
| AD9883/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:110 MSPS Analog Interface for Flat Panel Displays |
| AD9883A | 制造商:AD 制造商全稱:Analog Devices 功能描述:110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
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