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參數資料
| 型號： | AD9949KCPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 12-Bit CCD Signal Processor with Precision Timing Core |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, LEAD FREE, MO-220-VJJD-2, LFCSP-40 |
| 文件頁數： | 14/36頁 |
| 文件大?。?/td> | 707K |
| 代理商： | AD9949KCPZ |
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AD9949
Table 8. AFE Register Map
Data Bit
Content
00
[11:0]
01
[9:0]
02
[7:0]
03
[11:0]
04
[17:0]
05
[17:0]
Rev. B | Page 14 of 36
Address
Default Value
4
0
80
4
0
0
Name
OPRMODE
VGAGAIN
CLAMP LEVEL
CTLMODE
PxGA GAIN01
PxGA GAIN23
Description
AFE Operation Modes. (See Table 14.)
VGA Gain.
Optical Black Clamp Level.
AFE Control Modes. (See Table 15.)
PxGA Gain Registers for Color 0 [8:0] and Color 1 [17:9].
PxGA Gain Registers for Color 2 [8:0] and Color 3 [17:9].
Table 9. Miscellaneous Register Map
Data Bit
Content
10
[0]
Address
Default Value
0
Name
SW_RST
Description
Software Reset.
1 = Reset all registers to default, then self-clear back to 0.
Output Control.
0 = Make all dc outputs inactive.
Timing Core Reset Bar.
0 = Reset TG core.
1 = Resume operation.
Serial Update.
Sets the line (HD) within the field to update serial data.
Prevents the update of the VD updated registers.
1 = Prevent Update.
VD/HD Active Edge.
0 = Falling Edge Triggered.
1 = Rising Edge Triggered.
Field Value Sync.
0 = Next Field 0.
1 = Next Field 1.
2/3 = Next Field 2.
Retime HBLK to Internal H1 Clock.
Preferred setting is 1. Setting to 1 adds one cycle delay to HBLK
toggle positions.
CLP/BLK Pin Output Select.
0 = CLPOB.
1 = PBLK.
2 = HBLK.
3 = Low.
Enable CLP/BLK Output.
1 = Enable.
Internal Test Mode.
Should always be set high.
11
[0]
0
OUT_CONTROL
12
[0]
0
TGCORE_RSTB
13
[11:0]
0
UPDATE
14
[0]
0
PREVENTUPDATE
15
[0]
0
VDHDEDGE
16
[1:0]
0
FIELDVAL
17
[0]
0
HBLKRETIME
18
[1:0]
0
CLPBLKOUT
19
[0]
1
CLPBLKEN
1A
[0]
0
TEST MODE
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| AD9949AKCPZ | Circular Connector; No. of Contacts:61; Series:MS27474; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:24-61 RoHS Compliant: No |
| AD9949AKCPZRL | Circular Connector; No. of Contacts:61; Series:MS27474; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:24-61 RoHS Compliant: No |
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| AD9949KCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
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| AD9950TJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Parallel-Input Frequency Synthesizer |
| AD9951 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9951/PCBZ | 制造商:Analog Devices 功能描述:AD9951 400 MSPS DDS W/ 14 BIT DAC EVALBD - Boxed Product (Development Kits) |
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