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參數資料
型號: AD9954YSV-REEL7
廠商: ANALOG DEVICES INC
元件分類: 數字信號處理外設
英文描述: 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer
中文描述: DSP-NUM CONTROLLED OSCILLATOR, PQFP48
封裝: EXPOSED PAD, PLASTIC, MS-026-ABC, TQFP-48
文件頁數: 26/36頁
文件大小: 1027K
代理商: AD9954YSV-REEL7
AD9954
Rev. 0 | Page 26 of 36
0
FTW0
SINGLE–TONE
MODE
LINEAR SWEEP MODE
AT POINT A: LOAD RISING RAMP RATE REGISTER, APPLY RISING DFTW.
AT POINT B: LOAD FALLING RAMP RATE REGISTER, APPLY FALLING DFTW.
PS<0> = 1
PS<0> = 0
PS<0> = 0
TIME
FTW1
A
B
F
OUT
Figure 20. Linear Sweep Frequency Plan
0
FTW0
SINGLE–TONE
MODE
LINEAR SWEEP MODE ENABLE–NO DWELL BIT SET
FTW1
A
A
A
B
B
B
F
OUT
TIME
PS<0> = 1 PS<0> = 0
PS<0> = 0
PS<0> = 1
PS<0> = 1
PS<0> = 0
Figure 21. Linear Sweep Using No Dwell Frequency Plan
Linear Sweep No Dwell Feature
The linear sweep function can be operated with a no dwell fea-
ture. If the linear sweep no dwell bit is set, CFR1<2> = 1, the
rising sweep is started in an identical manner to the non-no
dwell linear sweep mode. Upon detecting a rising edge on the
PS<0> input pin, the rising sweep action is initiated. The fre-
quency continues to sweep up at the rate set by the rising sweep
ramp rate at the resolution set by the rising delta frequency
tuning word until it reaches the terminal frequency. Upon
reaching the terminal frequency, the output frequency immedi-
ately returns to the starting frequency and remains at the start-
ing frequency until the device detects a subsequent rising edge
on the PS<0> pin. Figure 21 is an example of the linear sweep
mode operation when the linear sweep no dwell bit is set. The
points labeled A indicate where a rising edge on PS0 is detected;
the points labeled B indicate where the AD9954 has determined
F
OUT
has reached the terminal frequency and automatically
returns to the starting frequency. Note that in this mode, each
sweep will require a separate rising edge on the Profile <0> pin.
Linear sweeps using the no-dwell bit can only be swept from
FTW0 to FTW1 using the positive linear sweep control word.
Toggling the PS<0> from 1 to 0 will not initiate a falling sweep
when the no dwell bit is set, nor will it interrupt a positive
sweep already underway.
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相關代理商/技術參數
參數描述
AD9954YSVZ 功能描述:IC DDS DAC 14BIT 1.8V 48-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數字合成 (DDS) 系列:- 產品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率(位):10 b 主 fclk:25MHz 調節字寬(位):32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR)
AD9954YSVZ 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9954 TQFP48
AD9954YSVZ1 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer
AD9954YSVZ-REEL7 功能描述:IC DDS DAC 14BIT 1.8V 48TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數字合成 (DDS) 系列:- 產品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率(位):10 b 主 fclk:25MHz 調節字寬(位):32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR)
AD9954YSVZ-REEL71 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer
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