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參數資料
型號: ADAU1401
廠商: Analog Devices, Inc.
元件分類: 數字信號處理
英文描述: SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
中文描述: SigmaDSP的28-/56-Bit音頻處理器雙ADC和4個DAC
文件頁數: 25/52頁
文件大小: 785K
代理商: ADAU1401
ADAU1401
SPI PORT
By default, the ADAU1401 is in I
2
C mode, but it can be put into
SPI control mode by pulling CLATCH/WP low three times. The
SPI port uses a 4-wire interface, consisting of CLATCH, CCLK,
CDATA, and COUT signals, and is always a slave port. The
CLATCH signal should go low at the beginning of a transaction
and high at the end of a transaction. The CCLK signal latches
CDATA during a low-to-high transition. COUT data is shifted
out of the ADAU1401 on the falling edge of CCLK and should be
clocked into a receiving device, such as a microcontroller, on the
CCLK rising edge. The CDATA signal carries the serial input
data, and the COUT signal is the serial output data. The COUT
signal remains three-stated until a read operation is requested.
This allows other SPI-compatible peripherals to share the same
readback line. All SPI transactions have the same basic format
shown in
Table 19. A timing diagram is shown in Figure 4. All
data should be written MSB first. The ADAU1401 cannot be
taken out of SPI mode without a full reset.
Chip Address R/W
Rev. 0 | Page 25 of 52
Table 18. ADAU1401 SPI Address Byte Format
Bit 0
Bit 1
Bit 2
Bit 3
0
0
0
0
Subaddress
The 12-bit subaddress word is decoded into a location in one of
the memories or registers. This subaddress is the location of the
appropriate RAM location or register. The MSBs of the subaddress
are zero-padded to bring the word to a full 2-byte length.
Data Bytes
The number of data bytes varies according to the register or
memory being accessed. During a burst mode write, an initial
subaddress is written followed by a continuous sequence of data
for consecutive memory/register locations. The detailed data
format for continuous mode operation is shown in
Table 26 in the Read/Write Data Formats section.
A sample timing diagram for a single-write SPI operation to the
parameter RAM is shown in
Figure 26. A sample timing diagram
of a single-read SPI operation is shown in Figure 27. The COUT
pin goes from three-state to being driven at the beginning of
Byte 3. In this example, Byte 0 to Byte 2 contain the addresses
and the R/
W bit and subsequent bytes carry the data.
Bit 4
0
Bit 5
0
Bit 6
ADDR0
Bit 7
R/W
Table 24 and
The first byte of an SPI transaction includes the 7-bit chip address
and a R/W bit. The chip address is set by the ADDR0 pin. This
allows two ADAU1401s to share a CLATCH signal, yet still operate
independently. When ADDR0 is low, the chip address is 0000000;
when it is high, the address is 0000001 (see Table 18). The LSB
of this first byte determines whether the SPI transaction is a
read (Logic Level 1) or a write (Logic Level 0).
Table 19. Generic Control Word Format
Byte 0
chip_adr [6:0], R/W
1
Continues to end of data.
Byte 1
0000, subadr [11:8]
Byte 2
subadr [7:0]
Byte 3
data
Byte 4
1
data
0
-
CLATCH
CCLK
CDATA
BYTE 0
BYTE 1
BYTE 2
BYTE 3
Figure 26. SPI Write to ADAU1401 Clocking (Single-Write Mode)
0
CLATCH
CCLK
CDATA
COUT
BYTE 0
BYTE 1
HI-Z
DATA
DATA
DATA
HI-Z
Figure 27. SPI Read from ADAU1401 Clocking (Single-Read Mode)
相關PDF資料
PDF描述
ADAU1401YSTZ SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
ADAU1401YSTZ-RL SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
ADAU1513 Class-D Audio Power Stage
ADAU1513ACPZ Class-D Audio Power Stage
ADAU1513ACPZ-RL Class-D Audio Power Stage
相關代理商/技術參數
參數描述
ADAU1401A 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
ADAU1401AWBSTZ 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP(10x10) 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1401AWBSTZ-RL 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP(10x10) 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1401YSTZ 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP(10x10) 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1401YSTZ-RL 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP(10x10) 包裝:Digi-Reel® 其它名稱:497-11050-6
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