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參數(shù)資料
| 型號： | ADCMP607 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators |
| 中文描述： | 軌到軌，速度非常快，2.5 V至5.5 V，單電源白血病比較 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大小： | 280K |
| 代理商： | ADCMP607 |
ADCMP606/ADCMP607
The hysteresis control pin appears as a 1.25 V bias voltage seen
through a series resistance of 7 kΩ ± 20% throughout the hysteresis
control range. The advantages of applying hysteresis in this manner
are improved accuracy, improved stability, reduced component
count, and maximum versatility. An external bypass capacitor is
not recommended on the LE/HYS pin because it impairs the latch
function and often degrades the jitter performance of the device.
As described in the Using/Disabling the Latch Feature section,
hysteresis control need not compromise the latch function.
CROSSOVER BIAS POINTS
In both op amps and comparators, rail-to-rail inputs of this type
have a dual front-end design. Certain devices are active near the
V
CC
rail and others are active near the V
EE
rail. At some predeter-
mined point in the common-mode range, a crossover occurs. At
this point, normally V
CC
/2, the direction of the bias current reverses
and the measured offset voltages and currents change.
Rev. 0 | Page 12 of 16
The ADCMP606/ADCMP607 comparators slightly elaborate
on this scheme. Crossover points are found at approximately
0.6 V and 1.6 V common mode.
MINIMUM INPUT SLEW RATE REQUIREMENT
With the rated load capacitance and normal good PC Board
design practice, as discussed in the Optimizing Performance
section, these comparators should be stable at any input slew
rate with no hysteresis. Broadband noise from the input stage is
observed in place of the violent chattering seen with most other
high speed comparators. With additional capacitive loading or
poor bypassing, oscillation is observed. This oscillation is due to
the high gain bandwidth of the comparator in combination with
feedback parasitics in the package and PC board. In many
applications, chattering is not harmful.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADCMP607BCPZ-R2 | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators |
| ADCMP607BCPZ-R7 | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators |
| ADCMP607BCPZ-WP | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators |
| ADCMP609 | Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| ADCMP609BRMZ1 | Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADCMP607BCPZ-R2 | 功能描述:IC COMP TTL/CMOS 1CHAN 12-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ADCMP607BCPZ-R7 | 功能描述:IC COMP TTL/CMOS 1CHAN 12-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ADCMP607BCPZ-WP | 功能描述:IC COMP TTL/CMOS 1CHAN 12-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:開路漏極 電壓 - 電源，單路/雙路(±):2.5 V ~ 11 V，±1.25 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:10mV @ 5V 電流 - 輸入偏壓（最小值）:- 電流 - 輸出（標(biāo)準(zhǔn)）:0.015mA @ 5V 電流 - 靜態(tài)（最大值）:8.5µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:- 磁滯:- 工作溫度:0°C ~ 70°C 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 安裝類型:表面貼裝 包裝:管件 產(chǎn)品目錄頁面:1386 (CN2011-ZH PDF) |
| ADCMP608 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| ADCMP608_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
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