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參數(shù)資料
| 型號： | ADF4117BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | RF PLL Frequency Synthesizers |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO16 |
| 封裝： | MO-153AB, TSSOP-16 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 226K |
| 代理商： | ADF4117BRU |
–3–
REV. 0
ADF4116/ADF4117/ADF4118
Parameter
B Version
B Chips
2
Unit
Test Conditions/Comments
NOISE CHARACTERISTICS
ADF4118 Phase Noise Floor
7
–170
–162
–170
–162
dBc/Hz typ
dBc/Hz typ
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ VCO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
Note 15
Note 15
@ 300 Hz Offset and 30 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 200 Hz Offset and 10 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
Phase Noise Performance
8
ADF4116
9
ADF4117
10
900 MHz Output
ADF4118
10
900 MHz Output
ADF4117
11
836 MHz Output
ADF4118
12
1750 MHz Output
ADF4118
13
1750 MHz Output
ADF4118
14
1960 MHz Output
540 MHz Output
–89
–87
–90
–78
–85
–65
–84
–89
–87
–90
–78
–85
–65
–84
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
Spurious Signals
ADF4116
9
ADF4117
10
900 MHz Output
ADF4118
10
900 MHz Output
ADF4117
11
836 MHz Output
ADF4118
12
1750 MHz Output
ADF4118
13
1750 MHz Output
ADF4118
14
1960 MHz Output
540 MHz Output
–88/–99
–90/–104
–91/–100
–80/–84
–88/–90
–65/–73
–80/–86
–88/–99
–90/–104
–91/–100
–80/–84
–88/–90
–65/–73
–80/–86
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
Note 15
Note 15
@ 30 kHz/60 kHz and 30 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
NOTES
Operating temperature range is as follows: B Version: –40
°
C to +85
°
C.
2
The B Chip specifications are given as typical values.
3
This is the maximum operating frequency of the CMOS counters.
4
AV
DD
= DV
DD
= 3 V; for AV
DD
= DV
DD
= 5 V, use CMOS-compatible levels.
5
Guaranteed by design. Sample tested to ensure compliance.
6
AV
DD
= DV
DD
= 3 V; RF
IN
for ADF4116 = 540 MHz; RF
IN
for ADF4117, ADF4118 = 900 MHz.
7
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value).
8
The phase noise is measured with the EVAL-ADF411xEB Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for
the synthesizer (f
REFOUT
= 10 MHz @ 0 dBm).
9
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 540 MHz; N = 2700; Loop B/W = 20 kHz.
10
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 900 MHz; N = 4500; Loop B/W = 20 kHz.
11
f
REFIN
= 10 MHz; f
PFD
= 30 kHz; Offset frequency = 300 Hz; f
RF
= 836 MHz; N = 27867; Loop B/W = 3 kHz.
12
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 1750 MHz; N = 8750; Loop B/W = 20 kHz.
13
f
REFIN
= 10 MHz; f
PFD
= 10 kHz; Offset frequency = 200 Hz; f
RF
= 1750 MHz; N = 175000; Loop B/W = 1 kHz.
14
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 1960 MHz; N = 9800; Loop B/W = 20 kHz.
15
Same conditions as above.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1
T
A
= T
MIN
to T
MAX
unless otherwise noted)
Limit at T
MIN
to T
MAX
(B Version)
Parameter
Unit
Test Conditions/Comments
t
1
t
2
t
3
t
4
t
5
t
6
10
10
25
25
10
20
ns min
ns min
ns min
ns min
ns min
ns min
DATA to CLOCK Setup Time
DATA to CLOCK Hold Time
CLOCK High Duration
CLOCK Low Duration
CLOCK to LE Setup Time
LE Pulsewidth
NOTE
1
Guaranteed by design but not production tested.
Specifications subject to change without notice.
(AV
DD
= DV
DD
= 3 V 10%, 5 V 10%; AV
DD
≤
V
P
< 6.0 V; AGND = DGND = CPGND = 0 V;
相關PDF資料 |
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|---|---|
| ADF4118BCP | RF PLL Frequency Synthesizers |
| ADF4118BRU | RF PLL Frequency Synthesizers |
| ADF4116BCP | RF PLL Frequency Synthesizers |
| ADF4116BRU | RF PLL Frequency Synthesizers |
| ADF4117 | RF PLL Frequency Synthesizers |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4117BRU-REEL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 16-Pin TSSOP T/R |
| ADF4117BRU-REEL7 | 功能描述:IC PLL FREQ SYNTHESIZER 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4117BRUZ | 功能描述:IC PLL RF FREQ SYNTHESZR 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| ADF4117BRUZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
| ADF4117BRUZ-RL | 功能描述:IC PLL RF FREQ SYNTHESZR 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
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