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參數(shù)資料
| 型號： | ADF4217 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | Dual RF PLL Frequency Synthesizers |
| 中文描述： | 雙射頻鎖相環(huán)頻率合成器 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大小： | 227K |
| 代理商： | ADF4217 |
REV. 0
–3–
ADF4216/ADF4217/ADF4218
Parameter
B Version
B Chips
2
Unit
Test Conditions/Comments
POWER SUPPLIES (Continued)
I
DD
(RF + IF)
6
ADF4216
ADF4217
ADF4218
I
DD
(RF Only)
ADF4216
ADF4217
ADF4218
I
DD
(IF Only)
ADF4216
ADF4217
ADF4218
I
P
(I
P
1 + I
P
2)
Low-Power Sleep Mode
See TPC 22 and TPC 23
9.0 mA typical at V
DD
= 3 V and T
A
= 25
°
C
12 mA typical at V
DD
= 3 V and T
A
= 25
°
C
14 mA typical at V
DD
= 3 V and T
A
= 25
°
C
18
21
25
9
12
14
mA max
mA max
mA max
10
14
18
5
7
9
mA max
mA max
mA max
5.0 mA typical at V
DD
= 3 V and T
A
= 25
°
C
7.0 mA typical at V
DD
= 3 V and T
A
= 25
°
C
9.0 mA typical at V
DD
= 3 V and T
A
= 25
°
C
9
9
9
0.6
5
4.5
4.5
4.5
0.6
5
mA max
mA max
mA max
mA max
μ
A max
4.5 mA typical at V
DD
= 3 V and T
A
= 25
°
C
4.5 mA typical at V
DD
= 3 V and T
A
= 25
°
C
4.5 mA typical at V
DD
= 3 V and T
A
= 25
°
C
T
A
= 25
°
C
0.5
μ
A typical
NOISE CHARACTERISTICS
Phase Noise Floor
7
–171
–164
–171
–164
dBc/Hz typ
dBc/Hz typ
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ VCO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 300 Hz Offset and 30 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 200 Hz Offset and 10 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
Phase Noise Performance
8
ADF4216, ADF4217, ADF4218 (IF)
9
ADF4216 (RF): 900 MHz Output
10
ADF4217 (RF): 900 MHz Output
10
ADF4218 (RF): 900 MHz Output
10
ADF4216 (RF): 836 MHz Output
11
ADF4217 (RF): 1750 MHz Output
12
ADF4217 (RF): 1750 MHz Output
13
ADF4218 (RF): 1960 MHz Output
14
Spurious Signals
ADF4216 ADF4217, ADF4218 (IF)
9
ADF4216 (RF): 900 MHz Output
10
ADF4217 (RF): 900 MHz Output
10
ADF4218 (RF): 900 MHz Output
10
ADF4216 (RF): 836 MHz Output
11
ADF4217 (RF): 1750 MHz Output
12
ADF4217 (RF): 1750 MHz Output
13
ADF4218 (RF): 1960 MHz Output
14
–91
–87
–88
–90
–78
–85
–66
–84
–91
–87
–88
–90
–78
–85
–66
–84
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
–97/–106
–98/–106
–91/–100
–80/–84
–80/–84
–88/–90
–65/–73
–80/–84
–97/–106
–98/–106
–91/–100
–80/–84
–80/–84
–88/–90
–65/–73
–80/–84
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 30 kHz/60 kHz and 30 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
NOTES
Operating temperature range is as follows: B Version: –40
°
C to +85
°
C.
2
The B Chip specifications are given as typical values.
3
This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the IF/RF input is divided down to a frequency that is
less than this value.
4
V
DD
1 = V
DD
2 = 3 V; For V
DD
1 = V
DD
2 = 5 V, use CMOS-compatible levels.
5
Guaranteed by design. Sample tested to ensure compliance.
6
P = 16; RF
= 900 MHz; IF
= 540 MHz.
7
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 logN (where N is the N divider value).
8
The phase noise is measured with the EVAL-ADF421XEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for the
synthesizer (f
REFOUT
= 10 MHz @ 0 dBm).
9
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
IF
= 540 MHz; N = 2700; Loop B/W = 20 kHz.
10
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 900 MHz; N = 4500; Loop B/W = 20 kHz.
11
f
REFIN
= 10 MHz; f
PFD
= 30 kHz; Offset frequency = 300 Hz; f
RF
= 836 MHz; N = 27867; Loop B/W = 3 kHz.
12
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 1750 MHz; N = 8750; Loop B/W = 20 kHz.
13
f
REFIN
= 10 MHz; f
PFD
= 10 kHz; Offset frequency = 200 Hz; f
RF
= 1750 MHz; N = 175000; Loop B/W = 1 kHz.
14
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 1960 MHz; N = 9800; Loop B/W = 20 kHz.
Specifications subject to change without notice.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADF4217BRU | Dual RF PLL Frequency Synthesizers |
| ADF4218 | Dual RF PLL Frequency Synthesizers |
| ADF4218BRU | Dual RF PLL Frequency Synthesizers |
| ADF4251 | Dual Fractional-N/Integer-N Frequency Synthesizer |
| ADF4251BCP | Dual Fractional-N/Integer-N Frequency Synthesizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4217BRU | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual RF PLL Frequency Synthesizers |
| ADF4217L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ADF4217L/18L/19L: Dual Low Power Frequency Synthesizers Data Sheet (Rev. B. 7/02) |
| ADF4217LBCC | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual Up to 188MHz 24-Pin LGA |
| ADF4217LBCC-REEL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual Up to 188MHz 24-Pin LGA T/R |
| ADF4217LBCC-REEL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual Up to 188MHz 24-Pin LGA T/R |
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