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參數(shù)資料
| 型號(hào)： | ADL5532 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 20 MHz to 500 MHz IF Gain Blocks |
| 中文描述： | 20 MHz至500 MHz的中頻增益模塊 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大小： | 223K |
| 代理商： | ADL5532 |
Preliminary Technical Data
ADL5532
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. PrD 5/07 | Page 5 of 8
5 CLIN
8 FBK2
NC 4
6 NC
RFIN 2
7 RFOUT
NC 3
FBK 1
PIN 1
INDICATOR
ADL5532
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions Single
Pin
No.
1,8
FBK1, FBK2
2
RFIN
7
RFOUT
Mnemonic
Description
For operation below 50 MHz a 100nF capacitor should be connected between these pins.
RF Input: Requires a DC blocking capacitor. For normal operating conditions a 10 nF capacitor is recommended
RF Output and Bias: DC bias provided to this pin through an inductor. For normal operating conditions a 470
nH inductor is recommended. RF path requires a DC blocking capacitor. For normal operating conditions a 10
nF capacitor is recommended.
No Connect
A 100 nF capacitor connected between pin 5 and ground provides decoupling for the on board linearizer.
Internally connected to GND. Solder to a low impedance ground plane
3, 4, 6
5
NC
CLIN
Exposed
Paddle
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| ADL5532ACPZ-R7 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:20 MHz to 500 MHz IF Gain Blocks |
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| ADL5533ACPZ-R7 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:30 MHz to 1000 MHz 75 ヘ Gain Block |
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