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參數(shù)資料
| 型號(hào)： | ADL5532 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 20 MHz to 500 MHz IF Gain Blocks |
| 中文描述： | 20 MHz至500 MHz的中頻增益模塊 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大小： | 223K |
| 代理商： | ADL5532 |
Preliminary Technical Data
ADL5532
EVALUATION BOARD
Figure 6 shows the schematic for the ADL5532 evaluation
board. The board is powered by a single 5V supply.
Rev. PrD 5/07 | Page 7 of 8
The components used on the board are listed in. Table 4 Power
can be applied to the board through clip-on leads (Vcc, Gnd), or
through Jumper W1.
Figure 6. Evaluation Board Schematic
Figure 7. Evaluation Board Layout (Top)
Figure 8. Evaluation Board Layout (Bottom)
Table 4. Evaluation Board Configuration Options
Component
Function
C1, C2
AC-coupling capacitors.
C3,
Provides decoupling for the on board linearizer.
C4
Stabilizes the internal feedback loop for operation below 50 MHz.
C5, C6
Power Supply decoupling capacitors capacitor.
Default Value
10 nF 0402
C3 100 nF 0603
C4 100 nF 0603
C5 10 nF 0603
C6 1 μF 0603
Open 0603
82 nH L0603
Open 0603
VCC Red
GND Black
Open 0603
C7, C8
L1
L2, L3, L4, L5
VCC & GND
DC bias inductor.
Clip-on terminals for power supply.
W1
R1, R2
2-pin jumper for connection of ground and supply via cable.
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| ADL5532ACPZ-R7 | 20 MHz to 500 MHz IF Gain Blocks |
| ADL5532ACPZ-WP | 20 MHz to 500 MHz IF Gain Blocks |
| ADL5532-EVALZ | 20 MHz to 500 MHz IF Gain Blocks |
| ADL5533 | 30 MHz to 1000 MHz 75 ヘ Gain Block |
| ADL5533ACPZ-R7 | 30 MHz to 1000 MHz 75 ヘ Gain Block |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADL5532ACPZ-R7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:20 MHz to 500 MHz IF Gain Blocks |
| ADL5532ACPZ-WP | 制造商:AD 制造商全稱:Analog Devices 功能描述:20 MHz to 500 MHz IF Gain Blocks |
| ADL5532-EVALZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:20 MHz to 500 MHz IF Gain Blocks |
| ADL5533 | 制造商:AD 制造商全稱:Analog Devices 功能描述:30 MHz to 1000 MHz 75 ヘ Gain Block |
| ADL5533ACPZ-R7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:30 MHz to 1000 MHz 75 ヘ Gain Block |
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