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參數(shù)資料
| 型號： | ADM1029ARQZ-R7 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 35/50頁 |
| 文件大?。?/td> | 402K |
| 描述： | IC SENSOR 2TEMP/FAN CTRL 24QSOP |
| 產(chǎn)品變化通告： | QSOP 24ld Pkg (MSL) Change 17/Jun/2010 |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 風(fēng)扇控制，溫度監(jiān)控器 |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應(yīng)溫度： | 0°C ~ 100°C，外部傳感器 |
| 精確度： | ±1°C 本地，±3°C 遠(yuǎn)程 |
| 拓?fù)洌?/td> | ADC，風(fēng)扇控制，寄存器庫 |
| 輸出類型： | 開路漏極 |
| 輸出警報： | 是 |
| 輸出風(fēng)扇： | 是 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-QSOP |
| 包裝： | 帶卷 (TR) |
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ADM1029
http://onsemi.com
35
STATUS REGISTERS
Table 21. REGISTER 00H STATUS REGISTER (POWER-ON DEFAULT 00H)
Bit
Name
R/W
Description
0
INT
R
This bit is set to 1 when the device is asserting INT
low. This bit is the
logical OR of several bits in other registers and is cleared when these bits
are cleared.
1
CFAULT_in
R
This bit is set to 1 when the device is receiving CFAULT
low from another
device.
2
CFAULT_out
R
This bit is set to 1 when the device is asserting CFAULT
low. This bit is the
logical OR of several bits in other registers and is cleared when these bits
are cleared.
3
In Alarm_speed
R
This bit is set to 1 when either fan is running at Alarm Speed. This bit is
the logical OR of several bits in other registers and is cleared when these
bits are cleared.
4
In Hot-Plug Speed
R
This bit is set to 1 when either fan is running at Hot-Plug Speed. This bit is
the logical OR of several bits in other registers and is cleared when these
bits are cleared.
5
GPIO/AIN Event
R
This bit is a logical OR of Bits 1, 3, 6, and 7 in the GPIO Behavior
Registers at 28h to 2Eh while they are configured as inputs, and Bit 7 in
the AIN Behavior Registers at 50h and 51h. It will be set when any of
these bits are set and cleared when all of these bits are cleared.
6
Hot Plug/Fan Fault
R
This bit is a logical OR of Bits 1, 3, 6, and 7 in the Fan Status Registers at
10h and 11h. It will be set when any of these bits are set and cleared
when all of these bits are cleared.
7
Thermal Event
R
This bit is a logical OR of Bit 7 in the Temp Fault Action Registers at 40h,
41h, and 42h. It will be set when any of these bits are set and cleared
when all of these bits are cleared.
Table 22. REGISTER 02H FAN SUPPORTED BY CONTROLLER (POWER-ON DEFAULT 03H)
Bit
Name
R/W
Description
0
Fan 1 = 1
R
This bit set to 1 means the ADM1029 can support Fan 1.
1
Fan 2 = 1
R
This bit set to 1 means the ADM1029 can support Fan 2.
2
Reserved
R
Unused. Will read back 0.
3
Reserved
R
Unused. Will read back 0.
4
Reserved
R
Unused. Will read back 0.
5
Reserved
R
Unused. Will read back 0.
6
Reserved
R
Unused. Will read back 0.
7
Reserved
R
Unused. Will read back 0.
Table 23. REGISTER 03H FANS SUPPORTED IN SYSTEM (POWER-ON DEFAULT 0000 00?1)
Bit
Name
R/W
Description
0
Fan 1 = 1
R/W
Indicates that Fan 1 is being used. Set to 1 on Power-up, but can be over-
written by software.
1
Fan 2 = ?
R/W
Indicates that Fan 2 is being used. Set by Pin 18 (TMIN/INSTALL) on
Power-up, but can be overwritten by software.
2
Reserved
R
Unused. Will read back 0.
3
Reserved
R
Unused. Will read back 0.
4
Reserved
R
Unused. Will read back 0.
5
Reserved
R
Unused. Will read back 0.
6
Reserved
R
Unused. Will read back 0.
7
Reserved
R
Unused. Will read back 0.
NOTE: Question marks on this and following pages indicate bit settings that depend on the state of certain pins on power-up.
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