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參數資料
型號: ADM1033ARQZ-RL7
廠商: ON Semiconductor
文件頁數: 11/35頁
文件大小: 424K
描述: IC THERM/FAN SPEED CTLR 16-QSOP
產品變化通告: MFG CHG Notification ADI to ON Semi
Product Discontinuation 30/Sept/2011
標準包裝: 1,000
功能: 風扇控制,溫度監控器
傳感器類型: 內部和外部
感應溫度: -40°C ~ 125°C,外部傳感器
精確度: ±1°C
拓撲: ADC,比較器,多路復用器,寄存器庫
輸出類型: SMBus?
輸出警報:
輸出風扇:
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-QSOP
包裝: 帶卷 (TR)
ADM1033
http://onsemi.com
11
Figure 18. Writing to the Address Pointer Register Only (Send Byte)
SCL
SDA
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1033
START BY
MASTER
1
9
1
ACK. BY
ADM1033
9
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
R/W
A3
A4
A5
A6
Figure 19. Reading Data from a Previously Selected Register
SCL
SDA
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK. BY
ADM1033
START BY
MASTER
9
1
ACK. BY
ADM1033
9
STOP BY
MASTER
A2
A1
A0
1
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADM1033
R/W
A3
A4
A5
A6
Register Addresses for Single/Block Byte Modes
The ADM1033 supports single byte as well as block read
and write operations. The register address determines
whether a single byte or multiple byte (block) operation is
run. For a single byte operation, the MSB of the register
address is set to 0; for a multiple byte operation, it is set to 1.
The number of bytes read in a multiple byte operation is set
in the #Bytes/Block Read Register at Address 0x00. The
number of bytes written to the ADM1033 is specified during
the block write operation. The addresses quoted in the
register map and throughout this data sheet assume single
byte operation. For multiple byte operations, set the MSB of
each register address to 1.
Write Operations
The SMBus specifications define protocols for read and
write operations. The ADM1033 supports send byte, write
byte, and block byte SMBus write protocols. The following
abbreviations are used in the diagrams:
S  START
P  STOP
R  READ
W  WRITE
A  ACKNOWLEDGE
A
  NO ACKNOWLEDGE
Send Byte
In   this   operation,   the   master   device   sends   a
single-command byte to a slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends a 7-bit address followed by the
write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends the register address.
5. The slave asserts ACK on SDA.
6. The master asserts a stop condition on SDA, and
the transaction ends.
Figure 20. Send Byte
SLAVE
ADDRESS
S
REG
ADDRESS
W
A
A
P
The ADM1033 uses the send byte operation to write a
register address to the APR for a subsequent read from the
same address. (See Figure 24). The user may be required to
read data from the register immediately after setting up the
address. If so, the master can assert a repeat start condition
immediately after the final ACK and carry out a single byte
read without asserting an intermediate stop condition.
Write Byte
In this operation, the master device sends a register
address and one data byte to the slave device as follows:
1. The master asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by a write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends the register address. The MSB of
the register address should equal 0 for a write byte
operation. If the MSB equals 1, a block write
operation takes place.
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on SDA to end
the transaction.
Figure 21. Write Byte Operation
SLAVE
ADDRESS
S
REG
ADDRESS
DATA
W
A
A
A
P
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