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參數資料
型號: ADM1041AARQZ-REEL
廠商: ANALOG DEVICES INC
元件分類: 通信及網絡
英文描述: Secondary-Side Controller with Current Share and Housekeeping
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO24
封裝: LEAD FREE, MO-137AE, QSOP-24
文件頁數: 14/56頁
文件大?。?/td> 991K
代理商: ADM1041AARQZ-REEL
ADM1041A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 14 of 56
ADM1041A
TOP VIEW
(Not to Scale)
V
DD
1
V
LS
/C
S
–/FS
2
C
S
+
C
CMP
V
CMP
3
4
5
SHRO
SHRS+
SCMP
V
S
+
V
S
–/SHRS–
F
G
AC_OK/OTP/MON5
24
23
22
21
20
F
D
6
GND
7
ICT
8
PULSE/AC
SENSE
1/MON1
AC
SENSE
2/MON2
10
CBD/ALERT
11
9
DC_OK/MON4
PSON/MON3
19
18
17
16
PEN
12
ADD0
SDA/PS
ON
LINK
SCL/AC_OKLink
15
14
13
0
Figure 7. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
1
V
DD
2
V
LS
/C
S
–/FS
Description
Positive Supply for the ADM1041A. Normal range is 4.5 V to 5.5 V. Absolute maximum rating is 6.5 V.
Inverting Differential Current Sense Input, Local Voltage Sense Pin, and OrFET Source. These three functions
are served by a common divider. The local voltage sense input is used for local overvoltage and undervoltage
sensing. This pin also provides an input to the false UV clamp that prevents shutdown during an external load
overvoltage condition. When supporting an OrFET circuit, this pin represents the FET source and is the
inverting input of a differential amplifier looking for the presence of a reverse voltage across the FET, which
might indicate a failure mode.
Noninverting Differential Current Sense Input. The differential sensitivity of C
S
+ and C
S
– is normally around 10
mV to 40 mV at the input to the ADM1041A. Nulling any external divider offset is achieved by injecting a
trimmable amount of current into either the inverting or noninverting input of the second stage of the
current sense amplifier. A compensation circuit is used to ensure the amount of current for zero-offset tracks
the common-mode voltage. Nulling of any amplifier offset is done in a similar manner except that it does not
track the common-mode voltage.
Current Error Amplifier Compensation. This pin is the output of the current limit transconductance error
amplifier. A series resistor and a capacitor to ground are required for loop compensation.
Voltage Error Amplifier Compensation. This is the output of a voltage error transconductance amplifier.
Compensate with a series capacitor and resistor to ground. An external emitter-follower or buffer is typically
used to drive an optocoupler. Output voltage positioning may be obtained by placing a second resistor
directly to ground. Refer to Analog Devices applications notes on voltage positioning.
A divider from the OrFET drain is connected here. A differential amplifier is then used to detect the presence
of a reverse voltage across the FET, which indicates a fault condition and causes the OrFET gate to be pulled
low.
Ground. This pin is double bonded for extra reliability. If the ground pin goes positive with respect to the
remote sense return (V
S
–) for a sustained period indicating that the negative remote sense line is
disconnected, PEN is disabled.
Input for Current Transformer. The sensitivity of this pin is suitable for the typical 0.5 V to 1 V signal that is
normally available. If this function is enabled, the C
S
+ amplifier is disabled. This pin is also used for extended
SMBus addressing, that is, pulled below ground to allow additional SMBus addresses.
Pulse Present, AC/Bulk Sense 1, or Monitor 1 Input.
PULSE: This tells the OrFET circuit that the voltage from the power transformer is normal. A peak hold allows
the OrFET circuit to pass through the pulse skipping that occurs with very light loads, but turns off the circuit
about one second after the last pulse is recognized.
AC
SENSE
1: This sense function also uses the peak voltage on this pin to measure the bulk capacitor voltage. If
too low, AC_OK and DC_OK can warn of an imminent loss of power. Threshold level and hysteresis can be
trimmed. When not selected, AC
SENSE
1 defaults to true.
MON1: When MON1 is selected for this pin, its input is compared against a 1.25 V comparator that could be
used for monitoring a postregulated output; includes overvoltage, undervoltage, and overtemperature
conditions.
3
C
S
+
4
C
CMP
5
V
CMP
6
F
D
7
GND
8
ICT
9
PULSE/AC
SENSE
1/
MON1
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