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參數資料
型號: ADM5180AN
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: Octal, RS-232/RS-423 Line Receiver
中文描述: LINE RECEIVER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數: 4/6頁
文件大小: 101K
代理商: ADM5180AN
PIN DE SCRIPT ION
Mnemonic
Function
V
DD
GND
A+ . . . H+
Power Supply Input, 5 V
±
5%.
Ground Pin. Must be connected to 0 V.
Noninverting Input to Differential Receivers
A to H.
Inverting Input to Differential Receivers A to H.
Receiver Outputs A to H.
A through D and FS2 controls receivers
E through H.
Failsafe Control Inputs. FS1 controls receivers
A through D and FS2 control Receiver
E through H.
A– . . . H–
A
O
. . .H
O
FS1, FS2
REV. 0
–4–
ADM5180
PIN CONFIGURAT IONS
DIP
A–
A+
V
DD
H
O
B+
B
O
FS1
G
O
G+
G–
A
O
B–
H+
H–
C–
FS2
C+
F
O
C
O
F+
D–
F–
D+
E
O
D
O
E+
GND
E–
13
18
1
2
28
27
5
6
7
24
23
22
3
4
26
25
8
21
9
20
10
19
11
12
17
16
14
15
TOP VIEW
(Not to Scale)
ADM5180
PLC C
H–
G
O
FS2
F
O
F+
G+
G–
B+
B
O
C+
C
O
D–
FS1
C–
B
A
O
V
D
H
O
H
A
D
D
O
E
E
O
F
G
E
A
26
27
28
4
2
3
15
18
17
16
12
14
13
25
24
21
20
19
23
22
TOP VIEW
(Not to Scale)
1
5
6
9
10
11
7
8
ADM5180
APPLICAT IONS INFORMAT ION
FAILSAFE OPE RAT ION
T he ADM5180 provides a failsafe operating mode to guard against
input fault conditions as defined in RS-422A and RS-423A
standards. T he fault conditions are (1) Driver in power-off
condition, (2) Receiver not interconnected with Driver, (3) Open-
circuited interconnecting cable, and (4) Short-circuited intercon-
necting cable. If any of these four fault conditions occurs at the
inputs of a receiver, then the output of that receiver is driven to a
known logic level. T he failsafe level is programmed using the
failsafe (FS) input. T here are two failsafe inputs, FS1 and FS2
which each control four receivers. FSI controls receivers A . . . D
and FS2 controls receivers E . . . H. A connection to V
on the
failsafe input sets the output high under fault conditions while a
connection to GND sets the output low.
FS1, FS2
Output During Fault Condition
V
DD
GND
High
Low
Input Filtering
T he ADM5180 contains internal low pass filtering for additional
noise rejection. Frequencies above the passband will be rejected.
For the specified input (5.5 MHz at
±
500 mV) the input stage
attenuates the signal such that the threshold levels are not reached
and therefore no change of state occurs on the output. T he filtering
is a function of both amplitude and and frequency. As the signal
amplitude decreases then the rejected frequency will decrease.
相關PDF資料
PDF描述
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相關代理商/技術參數
參數描述
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ADM5180AP-REEL 制造商:Analog Devices 功能描述:Octal Receiver RS-232/RS-423 28-Pin PLCC T/R 制造商:Analog Devices 功能描述:LINE RCVR 8RX 28PLCC - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:8CH.RS232/423/422RECEIVER - Tape and Reel
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ADM5180JN 制造商:Analog Devices 功能描述:Octal Receiver RS-232/RS-423 28-Pin PDIP W 制造商:Analog Devices 功能描述:LINE RCVR 8RX 28PDIP W - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:8CH.RS232/423/422 - Bulk
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