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參數(shù)資料
| 型號(hào)： | ADM695AR |
| 廠(chǎng)商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | Analog Switch / Multiplexer (Mux) IC; Analog Switch Function:High-Speed; Package/Case:16-SOIC; Leaded Process Compatible:Yes; Leakage Current:1nA; On Resistance, Rds(on):50ohm; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁(yè)數(shù)： | 6/16頁(yè) |
| 文件大小： | 284K |
| 代理商： | ADM695AR |
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ADM690–ADM695
REV. A
–6–
POWE R FAIL
RESET
OUT PUT
RESET
is an active low output which provides a
RESET
signal
to the Microprocessor whenever V
CC
is at an invalid level. When
V
CC
falls below the reset threshold, the
RESET
output is forced
low. T he nominal reset voltage threshold is 4.65 V (ADM690/
ADM691/ADM694/ADM695) or 4.4 V (ADM692/ADM693).
t
1
t
1
= RESET TIME.
V1 = RESET VOLTAGE THRESHOLD LOW
V2 = RESET VOLTAGE THRESHOLD HIGH
HYSTERESIS = V2–V1
V2
V2
V1
V1
t
1
V
CC
LOW LINE
RESET
Figure 2. Power Fail Reset Timing
On power-up
RESET
will remain low for 50 ms (200 ms for
ADM694 and ADM695) after V
CC
rises above the appropriate
reset threshold. T his allows time for the power supply and mi-
croprocessor to stabilize. On power-down, the
RESET
output
remains low with V
CC
as low as 1 V. T his ensures that the
microprocessor is held in a stable shutdown condition.
T his
RESET
active time is adjustable on the ADM691/ADM693/
ADM695 by using an external oscillator or by connecting an
external capacitor to the OSC IN pin. Refer to T able I and
Figure 4.
T he guaranteed minimum and maximum thresholds of the
ADM690/ADM691/ADM694/ADM695 are 4.5 V and 4.73 V,
while the guaranteed thresholds of the ADM692/ADM693 are
4.25 V and 4.48 V. T he ADM690/ADM691/ADM694/ADM695
is, therefore, compatible with 5 V supplies with a +10%, –5%
tolerance while the ADM692/ADM693 is compatible with 5 V
±
10% supplies. T he reset threshold comparator has approxi-
mately 50 mV of hysteresis. T he response time of the reset volt-
age comparator is less than 1
μ
s. If glitches are present on the
V
CC
line which could cause spurious reset pulses, then V
CC
should be decoupled close to the device.
In addition to
RESET
the ADM691/ADM693/ADM695 con-
tain an active high
RESET
output. T his is the complement of
RESET
and is intended for processors requiring an active high
RESET signal.
Watchdog T imer
RESET
T he watchdog timer circuit monitors the activity of the micro-
processor in order to check that it is not stalled in an indefinite
loop. An output line on the processor is used to toggle the
Watchdog Input (WDI) line. If this line is not toggled within the
selected timeout period, a
RESET
pulse is generated. T he
nominal watchdog timeout period is preset at 1.6 seconds on the
ADM690/ADM692/ADM694. T he ADM691/ADM693/ADM695
may be configured for either a fixed “short” 100 ms or a “l(fā)ong”
1.6 second timeout period or for an adjustable timeout period.
If the “short” period is selected, some systems may be unable to
service the watchdog timer immediately after a reset, so the
ADM691/ADM693/ADM695 automatically selects the “l(fā)ong”
timeout period directly after a reset is issued. T he watchdog
timer is restarted at the end of reset, whether the reset was
caused by lack of activity on WDI or by V
CC
falling below the
reset threshold.
T he normal (short) timeout period becomes effective following
the first transition of WDI after
RESET
has gone inactive. T he
watchdog timeout period restarts with each transition on the
WDI pin. T o ensure that the watchdog timer does not time out,
either a high-to-low or low-to-high transition on the WDI pin
must occur at or less than the minimum timeout period. If WDI
remains permanently either high or low, reset pulses will be
issued after each “l(fā)ong” timeout period (1.6 s). T he watchdog
monitor can be deactivated by floating the Watchdog Input
(WDI) or by connecting it to midsupply.
t
2
RESET
WDO
WDI
t
1
= RESET TIME.
t
2
= NORMAL (SHORT) WATCHDOG TIMEOUT PERIOD.
t
3
= WATCHDOG TIMEOUT PERIOD IMMEDIATELY FOLLOWING A RESET.
t
1
t
1
t
1
t
3
Figure 3. Watchdog Timeout Period and Reset Active
Time
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| ADM695AR-REEL | 功能描述:IC SUPERVISOR MPU 4.65V 16SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:400 系列:- 類(lèi)型:備用電池電路 監(jiān)視電壓數(shù)目:1 輸出:開(kāi)路漏極，推挽式 復(fù)位:高有效/低有效 復(fù)位超時(shí):最小為 35 ms 電壓 - 閥值:4.65V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:帶卷 (TR) 其它名稱(chēng):ADM691ARZ-REEL7TR |
| ADM695ARZ | 功能描述:IC SUPER MPU 4.65 100MA 16SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類(lèi)型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開(kāi)路漏極，開(kāi)路漏極 復(fù)位:高有效/低有效 復(fù)位超時(shí):最小為 250 ms 電壓 - 閥值:4.37V，4.62V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:管件 產(chǎn)品目錄頁(yè)面:1337 (CN2011-ZH PDF) |
| ADM695ARZ | 制造商:Analog Devices 功能描述:IC SUPERVISORY CIRCUIT |
| ADM695ARZ-REEL | 功能描述:IC SUPERVISOR MPU 4.65V 16SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:400 系列:- 類(lèi)型:備用電池電路 監(jiān)視電壓數(shù)目:1 輸出:開(kāi)路漏極，推挽式 復(fù)位:高有效/低有效 復(fù)位超時(shí):最小為 35 ms 電壓 - 閥值:4.65V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:帶卷 (TR) 其它名稱(chēng):ADM691ARZ-REEL7TR |
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