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參數資料
| 型號： | ADMCF340-EVALKIT |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:7; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:10-99 RoHS Compliant: No |
| 中文描述： | DashDSPTM 64無鉛閃存混合信號增強的DSP與模擬前端 |
| 文件頁數： | 20/40頁 |
| 文件大小： | 415K |
| 代理商： | ADMCF340-EVALKIT |
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REV. 0
ADMCF340
–20–
ICONST_TRIM
REG <2:0>
ADC1
ADC2
ADC3
ADCAUX
COMP
V1
V2
V3
V
REF
VAUX3 (V)
VAUX0
VAUX0 (V)
VAUX1
VAUX1 (V)
VAUX2
VAUX2 (V)
VAUX4
VAUX4 (V)
VAUX5
VAUX5 (V)
VAUX6
VAUX6 (V)
VAUX7
VAUX7 (V)
ICONST
CURRENT
VOLTAGE
CURRENT
VOLTAGE
CURRENT
VOLTAGE
8-1
MULTIPLEXER
MODECTRL REG <0..1>
COMP
COMP
COMP
ICONST
FILTER
V1
V2
V3
VAUX
PWMSYNC (CONVST)
MODECTRL
REG <07>
CLK
CAPACITOR
RESET
CAPACITOR
EXTERNALCHARGING
12-BIT
ADC
TIMER
BLOCK
ADC
REGISTERS
PWMTRIP
CHANNEL1
CHANNEL2
CHANNEL3
MODECTRL REG
<09..10..11>
Figure 11. ADC Overview
Single Slope ADC Operations
Comparing each ADC input to a reference ramp voltage and
timing the comparison of the two signals performs the conversion
process. The actual conversion point is the time point intersection
of the input voltage and the ramp voltage (V
C
) as shown in
Figure 12. This time is converted to counts by the 12-bit ADC
Timer Block and is stored in the ADC registers. The ramp
voltage used to perform the conversion is generated by driving a
fixed current into an off-chip capacitor, where the capacitor
voltage is:
V
Following reset,
V
C
= 0 at
t
= 0. This reset and the start of the
conversion process are initiated by the PWMSYNC pulse, as
shown in Figure 12. The width of the PWMSYNC pulse is
controlled by the PWMSYNCWT Register and should be
programmed according to Figure 12 to ensure complete resetting.
In order to compensate for IC process manufacturing tolerances
(and to adjust for capacitor tolerances), the current source of the
ADMCF340 is software programmable. The software setting of the
magnitude of the ICONST current generator is accomplished by
selecting one of eight steps over approximately 20% current range.
I C
/
t
C
=
(
)
×
Table VI. ADC Auxiliary Channel Selection
MODECTRL(5)
ADCMUX
MODECTRL(1)
ADCMUX1
MODECTRL(0)
ADCMUX0
Select
VAUX0
VAUX1
VAUX2
VAUX3 Calibration (V
REF
)
VAUX4
VAUX5
VAUX6
VAUX7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Table VII. Port A Multiplexing
PORTA Pin
First Alternate Function (Peripheral)
Second Alternate Function (Peripheral)
PORTA8
PORTA7
PORTA6
PORTA5
PORTA4
PORTA3
PORTA2
PORTA1
PORTA0
AUX0 (Auxiliary PWM Output)
AUX1 (Auxiliary PWM Output)
DR1 (Data Receive SPORT1)
FL1 (Flag Out SPORT1)
SCLK1 (Serial Clock SPORT1)
TFS0 (Transmit Frame Sync SPORT0)
RFS0 (Receive Frame Sync SPORT0)
DT0 (Data Transmit SPORT0)
DR0 (Data Receive SPORT0)
CLKOUT (System CLOCK)
PWMSYNC (PWM)
None
DT1 (Data Transmit SPORT1)
SCLK0 (Serial Clock SPORT0)
None
None
None
None
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