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參數(shù)資料
| 型號： | ADN2890ACP-RL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | 3.3 V 2.7 Gb/s Limiting Amplifier |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, QCC16 |
| 封裝： | 3 X 3 MM, MO-220-VEED-2, LFCSP-16 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 263K |
| 代理商： | ADN2890ACP-RL7 |
ADN2890
THEORY OF OPERATION
LIMAMP
Input Buffer
The limiting amplifier has differential inputs (PIN/NIN), with
an internal 50 termination. The ROSA (receive optical sub-
assembly) is typically ac-coupled to the ADN2890 inputs,
although dc coupling is possible.
Rev. 0 | Page 8 of 12
An internal offset correction loop requires that a capacitor be
connected between the CAZ1 and CAZ2 pins. A 0.01 μF
capacitor provides a low frequency cutoff of 2 kHz.
CML Output Buffer
The ADN2890 provides CML outputs, OUTP/OUTN. The
outputs are internally terminated with 50 to VCC.
The outputs can be kept at a static voltage by driving the
SQUELCH pin to a logic high. The SQUELCH pin can be
driven directly by the LOS pin, which automatically disables the
LIMAMP outputs in situations with no data input.
LOSS OF SIGNAL (LOS) DETECTOR
The receiver front-end LOS detector circuit indicates when the
input signal level has fallen below the user-adjustable threshold.
The threshold is set by a resistor connected between the
THRADJ pin and V
EE
. The ADN2890 LOS circuit has a trip
point down to <3.0 mV with >3 dB electrical hysteresis to
prevent chatter at the LOS output. The LOS output is an open-
collector output that must be pulled up externally with a 4.7 k
to 10 k resistor.
RECEIVED SIGNAL STRENGTH INDICATOR (RSSI)
The ADN2890 has an on-chip RSSI circuit that automatically
detects the average received power based on a direct measure-
ment of the PIN photodiode’s current. The photodiode bias is
supplied by the ADN2890, which allows a very accurate, on-
chip, average power measurement based on the amount of
current supplied to the photodiode. The output of the RSSI is a
current that is directly proportional to the average amount of
PIN photodiode current. Placing a resistor between the
RSSI_OUT pin and GND converts the current to a GND
referenced voltage. This function eliminates the need for
external RSSI circuitry in SFF-8472 compliant optical receivers.
SQUELCH MODE
Driving the SQUELCH input to a logic high disables the
limiting amplifier outputs. The SQUELCH input can be
connected to the LOS output to keep the limiting amplifier
outputs at a static voltage level anytime the input level to the
limiting amplifier drops below the programmed LOS threshold.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADN2890ACPZ-RL | 功能描述:IC AMP LIM 16LFCSP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:- 放大器類型:J-FET 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:13 V/µs 增益帶寬積:3MHz -3db帶寬:- 電流 - 輸入偏壓:65pA 電壓 - 輸入偏移:3000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應商設備封裝:8-PDIP 包裝:管件 |
| ADN2890ACPZ-RL7 | 功能描述:IC AMP LIM 16LFCSP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:- 放大器類型:J-FET 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:13 V/µs 增益帶寬積:3MHz -3db帶寬:- 電流 - 輸入偏壓:65pA 電壓 - 輸入偏移:3000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應商設備封裝:8-PDIP 包裝:管件 |
| ADN2890XCP | 制造商:Analog Devices 功能描述:- Trays |
| ADN2891 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 3.2 Gbps, Limiting Amplifier |
| ADN2891ACP | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 3.2 Gbps, Limiting Amplifier |
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