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參數資料
| 型號： | ADP3160JR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 5-Bit Programmable 2-Phase Synchronous Buck Controller |
| 中文描述： | DUAL SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數： | 9/16頁 |
| 文件大小： | 292K |
| 代理商： | ADP3160JR |
REV. B
ADP3160/ADP3167
–9–
Two main core types can be used in this application. Open
magnetic loop types, such as beads, beads on leads, and rods and
slugs, provide lower cost but do not have a focused magnetic field
in the core. The radiated EMI from the distributed magnetic
field may create problems with noise interference in the circuitry
surrounding the inductor. Closed-loop types, such as pot cores,
PQ, U, and E cores, or toroids, cost more, but have much
better EMI/RFI performance. A good compromise between
price and performance are cores with a toroidal shape.
There are many useful references for quickly designing a power
inductor. Table II gives some examples.
Table II. Magnetics Design References
Magnetic Designer Software
Intusoft (www.intusoft.com)
Designing Magnetic Components for High-Frequency DC-DC
Converters
McLyman, Kg Magnetics
ISBN 1-883107-00-08
Selecting a Standard Inductor
The companies listed in Table III can provide design consul-
tation and deliver power inductors optimized for high power
applications upon request.
Table III. Power Inductor Manufacturers
Coilcraft
(847) 639-6400
www.coilcraft.com
Coiltronics
(561) 752-5000
www.coiltronics.com
Sumida Electric Company
(510) 668-0660
www.sumida.com
C
OUT
Selection—Determining the ESR
The required equivalent series resistance (ESR) and capacitance
drive the selection of the type and quantity of the output capacitors.
The ESR must be small enough to contain the voltage devia-
tion caused by a maximum allowable CPU transient current
within the specified voltage limits, giving consideration also to the
output ripple and the regulation tolerance. The capacitance must
be large enough that the voltage across the capacitor, which is the
sum of the resistive and capacitive voltage deviations, does not
deviate beyond the initial resistive deviation while the inductor
current ramps up or down to the value corresponding to the new
load current. The maximum allowed ESR also represents the
maximum allowed output resistance, R
OUT
.
The cumulative errors in the output voltage regulations cut into
the available regulation window, V
WIN
. When considering dynamic
load regulation this relates directly to the ESR. When consider-
ing dc load regulation, this relates directly to the programmed
output resistance of the power converter.
Some error sources, such as initial voltage accuracy and ripple
voltage, can be directly deducted from the available regulation
window. Other error sources scale proportionally to the
amount of voltage positioning used, which, for an optimal design,
should use the maximum that the regulation window will allow.
The error determination is a closed-loop calculation, but it can
be closely approximated. To maintain a conservative design while
avoiding an impractical design, various error sources should
be considered and summed statistically.
The output ripple voltage can be factored into the calculation by
summing the output ripple current with the maximum output
current to determine an effective maximum dynamic current
change. The remaining errors are summed separately according
to the formula:
V
V
(
V
k
I
+
I
I
k
k
k
k
mV
WIN
VID
VID
O
O
O
RCS
CSF
2
RT
EA
=
￥
￥
+ê
ˉ +
+
ê
á
á
ˉ
–(
))
–
D
D
2
1
94
2
2
2
2
(3)
where
k
VID
= 0.7% is the initial programmed voltage tolerance
from the graph of Figure 4,
k
RCS
= 2% is the tolerance of the
current sense resistor,
k
CSF
= 20% is the summed tolerance of the
current sense filter components,
k
RT
= 2% is the tolerance of the
two termination resistors added at the COMP pin, and
k
EA
= 8%
accounts for the IC current loop gain tolerance including the g
m
tolerance.
The remaining window is then divided by the maximum output
current plus the ripple to determine the maximum allowed ESR
and output resistance:
R
R
V
I
I
R
mV
+
A
A
m
E MAX
(
OUT MAX
(
WIN
+
=
1 5
O
O
.
E MAX
(
)
)
)
.
.
=
=
=
D
W
94
53 4
9 9
(4)
The output filter capacitor bank must have an ESR of less than
1.5 m
W
. One can, for example, use nine MBZ-type capacitors
from Rubycon, with 2.2 mF capacitance, a 6.3 V voltage rating,
and 13 m
W
ESR. The nine capacitors have a maximum total ESR
of 1.44 m
W
when connected in parallel. Without ADOPT voltage
positioning, the ESR would need to be less than 0.9 m
W
, yielding
a 50% increase to 14 MBZ-type output capacitors.
C
OUT
—Checking the Capacitance
As long as the capacitance of the output capacitor is above a
critical value and the regulating loop is compensated with
ADOPT, the actual value has no influence on the peak-to-peak
deviation of the output voltage to a full step change in the load
current. The critical capacitance can be calculated as follows:
C
I
R
V
L
2
C
A
m
nH
2
mF
OUT CRIT
(
O
E
OUT
.
W ￥
OUT CRIT
(
)
)
.
.
.
=
￥
53 4
￥
=
￥
=
1 44
1 7
600
6 5
(5)
The critical capacitance for the nine Rubycon capacitors with
an equivalent ESR of 1.44 m
W
is 6.5 mF, while the equivalent
capacitance of those nine capacitors is 9
￥
2.2 mF = 19.8 mF.
Therefore, the capacitance is safely above the critical value.
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| ADP3160JR-REEL | 制造商:Rochester Electronics LLC 功能描述:5BIT PRGRM'BLE 2PHASE SYNCRO BUCK CNTRLR - Tape and Reel |
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