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參數資料
| 型號： | ADP3166JRU-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 5-Bit Programmable 2-, 3-, 4-Phase Synchronous Buck Controller |
| 中文描述： | SWITCHING CONTROLLER, 4000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | TSSOP-28 |
| 文件頁數： | 13/20頁 |
| 文件大小： | 351K |
| 代理商： | ADP3166JRU-REEL7 |
REV. 0
ADP3166
–13–
4.Compute the relative values for
R
CS1
,
R
CS2
, and
R
TH
using
R
=
A – B
r
r – A
)
×
– B
1
r +B
)
×
– A
r
A
– B
r – B
– A
r – A – B
R
=
1– A
(
– R
–
A
r – R
R
=
– R
–R
CS
CS
C
CS
TH
CS
CS
2
1
1
1
2
1
2
2
1
1
×
(
1
1
1
1
1
1
1
(
)
×
×
(
×
×
(
)
×
×
(
)
×
)
)
S
(8)
5.Calculate
R
TH
=
r
TH
R
CS
, then select the closest value of
thermistor available. Also compute a scaling factor
k
based on
the ratio of the actual thermistor value used relative to the
computed one:
R
TH ACTUAL
6.Finally, calculate values for
R
CS1
and
R
CS2
using the following:
R
= R
k
R
CS
CS
CS
1
1
1
×
For this example, R
CS
has been chosen to be 100 k
, so we start
with a thermistor value of 100 k
. Looking through available 0603
size thermistors, we find a Vishay NTHS0603N01N1003JR NTC
thermistor with A = 0.3602 and B = 0.09174. From these we
compute R
CS1
= 0.3796, R
CS2
= 0.7195 and R
TH
= 1.0751.
Solving for R
TH
yields 107.51 k
, so we choose 100 k
, mak-
ing
k
= 0.9302. Finally, we find R
CS1
and R
CS2
to be 35.3 k
and 73.9 k
. Choosing the closest 1% resistor values yields a
choice of 35.7 k
and 73.2 k
.
Output Offset
AMD’s specification requires that at no load, the nominal output
voltage of the regulator be offset to a higher value than the nominal
voltage corresponding to the VID code. The offset is set by a con-
stant current source flowing out of the FB pin (
I
FB
) and flowing
through
R
B
. The value of
R
B
can be found using Equation 11:
k=
R
TH CALCULATED
)
)
(9)
R
= R
-k + k
R
CS
CS
CS
2
2
× ×
×
(
)
(
)
(10)
R =V
–V
I
R =
V – . V
A
15
μ
= .
k
ONL
VID
FB
1 53
1 5
(11)
The closest standard 1% resistor value is 2.00 k
.
C
OUT
Selection
The required output decoupling for the regulator is typically
recommended by AMD for various processors and platforms.
One can also use some simple design guidelines to determine
what is required. These guidelines are based on having both
bulk and ceramic capacitors in the system.
The first thing is to select the total amount of ceramic capaci-
tance, which is based on the number and type of capacitor to be
used. The best location for ceramics is inside the socket. Others
can be placed along the outer edge of the socket as well.
Combined ceramic values of 30
μ
F to 100
μ
F are recommended,
usually made up of multiple ceramic capacitors. Select the num-
ber of ceramics and find the total ceramic capacitance (C
Z
).
Next, there is an upper limit imposed on the total amount of
bulk capacitance (C
X
) when one considers the VID on-the-fly
voltage stepping of the output (voltage step V
V
in time t
V
with
error of V
ERR
) and a lower limit based on meeting the critical
capacitance for load release for a given maximum load step
I
O
:
C
L
R
I
n
V
C
X MIN
(
O
OD
VID
Z
)
–
≥
×
×
×
(12)
C
L
2
n
K
R
V
V
+ t
V
V
n
K
R
L
–1
– C
X MAX
O
V
VID
V
VID
V
O
Z
)
≤
×
×
×
×
×
×
×
2
2
1
(13)
where
K
–
InV
V
ERR
V
To meet the conditions of these expressions and transient
response, the ESR of the bulk capacitor bank (R
X
) should be
less than or equal to the dynamic droop resistance, R
OD
. If the
C
X(MIN)
is larger than C
X(MAX)
, the system will not meet the VID
on-the-fly specification and may require the use of a smaller
inductor or more phases (and may have to increase the switch-
ing frequency to keep the output ripple the same).
For our example, a combination of MLCC capacitors (C
Z
= 50
μ
F)
was used. The VID on-the-fly step change is from 1.5 V to 0.8 V
(making V
V
= 700 mV) in 100
μ
s with a setting error of 3%.
Solving for the bulk capacitance yields
C
nH
m
A
V
F
mF
X MIN
(
)
.
.
–
.
≥
×
×
μ
=
600
3 1 9
24
1 5
50
1 63
C
nH
3 3 5
mV
1. V
.
+
ms
mV
.
nH
–
–
mF =
20. mF
X MAX
2
)
≤
×
2
×
×
×
700
× ×
×
×
600
700
1
100
1. V
600
1
50
where
K = 3.5.
Using eight 820
μ
F OSCONs with a typical ESR of 12 m
each
yields C
X
= 6.56 mF with an R
X
= 1.5 m
.
One last check should be made to ensure that the ESL of the
bulk capacitors (
L
X
) is low enough to limit the initial high fre-
quency transient spike. This is tested using
L
C
R
L
mF
1. mW =
pH
X
Z
OD
×
X
≥
≥
×
×
×
2
2
50
361
2
(14)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADP3166JRUZ-REEL | 功能描述:IC REG BUCK 5BIT 2-4PHAS 28TSSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩壓器 - 專用型 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,000 系列:- 應用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數:10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應商設備封裝:42-WLP 包裝:帶卷 (TR) |
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| ADP3167JR-REEL7 | 制造商:Rochester Electronics LLC 功能描述:5BIT PROG'BLE 2 PHASE SYNCRO BUCK CNTRLR - Tape and Reel |
| ADP3168 | 制造商:AD 制造商全稱:Analog Devices 功能描述:6-Bit, Programmable 2-, 3-, 4-Phase Synchronous Buck Controller |
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