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參數資料
| 型號： | ADP3170JRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 穩壓器 |
| 英文描述： | VRM 8.5 Compatible Single Phase Core Controller |
| 中文描述： | SWITCHING CONTROLLER, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數： | 12/16頁 |
| 文件大小： | 183K |
| 代理商： | ADP3170JRU |
REV. 0
ADP3170
–12–
higher efficiency, but increase the system cost. A Fairchild
FDB7045L (R
DS(ON)
= 4.5 m
nominal, 6 m
worst-case) is a
good choice for both the low-side and high-side MOSFET.
With this choice, the high-side MOSFET dissipation is:
where the second term represents the turn-off loss of the
MOSFET and the third term represents the turn-on loss due to
the stored charge in the body diode of the low-side MOSFET.
In the second term, Q
G
is the gate charge to be removed from
the gate for turnoff and I
G
is the gate turn-off current. From the
data sheet, the value of Q
G
for the FDB7045L is 50 nC and the
peak gate drive current provided by the ADP3170 is about 1 A. In
the third term, Q
RR
is the charge stored in the body diode of
the low-side MOSFET at the valley of the inductor current.
The data sheet of the FDB7045L does not give that informa-
tion, so an estimated value of 100 nC is used. The estimate is
based on information found on the data sheets of similar devices.
The low-side MOSFET dissipation is:
P
R
I
V
I
Q
f
I
V
Q
f
P
m
A
A
nC
A
1
kHz
V
nC
kHz
W
HSF
DS ON HSF
(
HSF MAX
(
IN
L(
G
MIN
G
IN
RR
MIN
HSF
=
×
+
×
×
×
×
+
×
×
=
×
+
×
×
2
×
×
+
×
×
=
)
)
)
.
.
.
2
2
2
6
14 7
5
28 6
50
183
5
100
183
2 04
(24)
P
R
I
P
m
A
W
LSF
DS ON HSF
×
HSF MAX
=
.
1 94
LSF
=
=
×
(
)
(
)
2
2
6
18
(25)
Note that there are no switching losses in the low-side MOSFET.
Surface mount MOSFETs are preferred in CPU core converter
applications due to their ability to be handled by automatic
assembly equipment. The TO-263 package offers the power
handling of a TO-220 in a surface mount package. However,
this package still needs adequate copper area on the PCB to
help move the heat away from the package.
The junction temperature for a given area of two-ounce copper
can be approximated using:
(
assuming:
JA
= 45
°
C/W for 0.5 in
2
JA
= 36
°
C/W for 1 in
2
JA
= 28
°
C/W for 2 in
2
For 1 in
2
of copper area attached to each transistor and an
ambient temperature of 50
°
C:
(
=
×
(
T
P
T
A
D
A
J
J
=
×
)
+
θ
(26)
T
C W
/
W
C
C
T
C W
/
W
C
C
HSF
J
LSF
J
=
×
)
+
)
+
=
=
28
2 06
.
50
108
28
1 94
.
50
104
o
o
o
o
o
o
All of the above-calculated junction temperatures are safely
below the 175
°
C maximum specified junction temperature of
the selected MOSFETs.
Power MOSFE T s
Two external N-channel power MOSFETs must be selected for
use with the ADP3170, one for the main switch and one for the
synchronous switch. The main selection parameters for the power
MOSFETs are the threshold voltage (V
GS(TH)
), the ON-resistance
(R
DS(ON)
), and the gate charge (Q
G
). Logic-level MOSFETs are
highly recommended. Only logic-level MOSFETs with V
GS
ratings
higher than the absolute maximum value of V
CC
should be used.
The maximum output current I
O(MAX)
determines the R
DS(ON)
requirement for the two power MOSFETs. When the ADP3170
is operating in continuous mode, the simplifying assumption can
be made that one of the two MOSFETs is always conducting
the average load current. For V
IN
= 5 V and V
OUT
= 1.8 V, the
maximum duty ratio of the high-side FET is:
(
=
1
183
D
f
t
D
kHz
s
HSF MAX
(
MIN
OFF
×
HSF MAX
(
)
)
–
– (
.
)
%
=
×
)
=
1
3 3
40
μ
(17)
The maximum duty ratio of the low-side (synchronous rectifier)
MOSFET is:
D
D
LSF MAX
(
HSF MAX
(
)
)
–
%
=
=
1
60
(18)
The maximum rms current of the high-side MOSFET is:
I
D
I
I
I
vI
I
A
A
A
A
A
HSF MAX
(
HSF MAX
(
L(
L(
L(
L(
HSF MAX
(
)
)
)
)
3
)
)
)
.
.
(
.
.
)
.
.
=
×
+
×
(
)
+
=
×
+
×
3
+
=
2
2
2
2
0 4
17 4
17 4
28 6
28 6
14 7
(19)
The maximum rms current of the low-side MOSFET is:
I
D
I
I
I
I
I
A
A
A
A
A
LSF MAX
(
LSF MAX
(
L VALLEY
(
L VALLEY
(
L PEAK
(
L PEAK
(
HSF MAX
(
)
)
)
)
)
)
)
.
.
.
.
.
=
×
+
×
(
)
+
=
×
+
×
3
(
)
+
=
2
2
2
2
3
0 6
17 4
17 4
28 6
28 6
18
(20)
The R
DS(ON)
for each MOSFET can be derived from the
allowable dissipation. If 10% of the maximum output power is
allowed for MOSFET dissipation, the total dissipation will be:
P
P
V
I
V
A
W
D(
OUT
.
OUT(
23
D FET
(
s
s
)
)
)
.
.
.
=
=
×
×
×
=
0 1
0 1 1 8
4 1
(21)
Allocating half of the total dissipation for the high-side MOSFET and
half for the low-side MOSFET, and assuming that the resis-
tive loss of the high-side MOSFET is one-third, and the switching
loss is two-thirds of its portion, the required maximum MOSFET
resistances will be:
R
P
I
W
.
A
m
DS ON HSF
(
D FETS
(
HSF(
)
)
)
.
=
×
=
=
3
4 1
3 14 7
6
2
2
(22)
R
P
I
W
A
m
DS ON LS
(
D FETS
(
LSF(
)
)
)
.
=
=
=
2
2
4 1
2 18
6
(23)
Note that there is a trade-off between converter efficiency and
cost. Larger MOSFETs reduce the conduction losses and allow
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