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參數資料
| 型號： | ADP3203JRU-10-RL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 2-Phase IMVP-II & IMVP-III Core Controller for Mobile CPUs |
| 中文描述： | 2相IMVP的-Ⅱ |
| 文件頁數： | 7/12頁 |
| 文件大小： | 153K |
| 代理商： | ADP3203JRU-10-RL |
ADP3203
REV. PrD
–7–
PRELIMINARY TECHNICAL DATA
Pin
Mnemonic
Function
21
OUT2
Output to Driver 2. This is a digital output pin which is used to command the state of the
switched node via the driver. It should be connected to the IN pin of the ADP3415 driver that
corresponds to the second of two channels.
22
CS1
Current Sense, Channel 1. This is a high-impedance analog input pin which is used for providing
negative feedback of the current information for the first of two channels.
23
CS2
Current Sense, Channel 2. This is a high-impedance analog input pin which is used for providing
negative feedback of the current information for the second of two channels. The pin is also used
to determine whether the chip is acting as a single or dual-phase controller. If the pin is tied to
VCC but not a sense resistor then the dual-phase operation is disabled; the chip works as a single
phase controller. In this condition the second phase's output signal (OUT2) is not switching but
stays static low.
24
VCC
Power supply. This should be connected to the system's 3.3 V power supply output.
25
RAMP
Regulation Ramp Feedback Input. The RAMP pin voltage is compared against the REG pin for
cycle-by-cycle switching response. Several switched current sources also appear at this input, the
cycle-by-cycle hysteresis-setting switched current programmed by the HYSSET pin, the BOM
shift current programmed by the BSHIFT pin, and the Deep Sleep shift current programmed by
the DSHIFT pin. The external resistive termination at this pin sets the magnitude of the hysteresis
applied to the regulation loop.
26
REG
Regulation Voltage Summing Input. This is a high-impedance analog input pin into which the
voltage reference of the feedback loop allows the summing of both the DACOUT voltage and the
core voltage for programming the output resistance of the core voltage regulator. This is also the
pin at which an optimized transient response can be tailored using Analog Devices' patented
ADOPT design technique.
27
CS+
Current Limit Positive Sense. This is a high-impedance analog input pin that is multiplexed
between either of the two current-sense inputs during the high state of the OUT pin of the
respective channel. During the common off-time of both channels the pin's voltage reflects the
average of the two channels. The multiplexed current sense signal is passed to the core comparator
through an external resistive termination connected from this pin to the RAMP pin. The external
(RAMP) resistor sets the magnitude of the hysteresis applied to the regulation loop.
28
CS-
Current Limit Negative Sense. This is a high-impedance analog input pin which is normally
Kelvin connected via a current-limit programming resistor to the negative node of the current
sense resistor(s). A hysteretically-controlled current - three times the current programmed at the
HYSSET pin - also flows out of this pin and develops a current-limit-setting voltage across that
resistor which then must be matched by the inductor current flowing in the current sensing
resistor in order to trigger the current limit function. When triggered, the current flowing out of
this pin is reduced to two-thirds of its previous value, producing hysteresis in the current limiting
function.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADP3203JRU-10-RL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2-Phase IMVP-II & IMVP-III Core Controller for Mobile CPUs |
| ADP3204 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs |
| ADP3204JCP | 制造商:AD 制造商全稱:Analog Devices 功能描述:3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs |
| ADP3204JCP-REEL | 制造商:Analog Devices 功能描述: |
| ADP3204JCP-REEL7 | 制造商:Rochester Electronics LLC 功能描述:3 PHASE PEAK/PEAK DC/DC MODE CONTROLLER - Tape and Reel |
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