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參數(shù)資料
型號: ADP3419
廠商: Analog Devices, Inc.
英文描述: Dual Bootstrapped, High Voltage MOSFET Driver with Output Disable
中文描述: 雙自舉,高電壓MOSFET的輸出驅(qū)動器禁用
文件頁數(shù): 6/16頁
文件大小: 317K
代理商: ADP3419
ADP3419
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. A | Page 6 of 16
ADP3419
TOP VIEW
(Not to Scale)
IN
SD
DRVLSD
CROWBAR
VCC
BST
DRVH
SW
GND
DRVL
1
2
3
10
9
8
4
5
6
7
0
Figure 5. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
1
IN
Function
Logic Level PWM Input. This pin has primary control of the drive outputs. In normal operation, pulling this pin
low turns on the low-side driver; pulling it high turns on the high-side driver.
Shutdown Input. When low, this pin disables normal operation, forcing DRVH and DRVL low.
Synchronous Rectifier Shutdown Input. When low, DRVL is forced low; when high, DRVL is enabled and
controlled by IN and by the adaptive overlap protection control circuitry.
Crowbar Input. When high, DRVL is forced high regardless of the high-side MOSFET switch condition.
Input Supply. This pin should be bypassed to GND with a 4.7 μF or larger ceramic capacitor.
Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) MOSFET.
Ground. This pin should be closely connected to the source of the lower MOSFET.
Switch Node Input. This pin is connected to the buck-switching node, close to the upper MOSFET’s source. It is
the floating return for the upper MOSFET drive signal. It is also used to monitor the switched voltage to prevent
turn-on of the lower MOSFET until the voltage is below ~1 V.
Buck Drive. Output drive for the upper (buck) MOSFET.
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between the BST and SW pins holds this
bootstrapped voltage for the high-side MOSFET as it is switched.
2
3
SD
DRVLSD
4
5
6
7
8
CROWBAR
VCC
DRVL
GND
SW
9
10
DRVH
BST
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