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參數資料
| 型號： | ADP3510 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| 中文描述： | CDMA的電源管理系統 |
| 文件頁數： | 15/16頁 |
| 文件大小： | 283K |
| 代理商： | ADP3510 |
REV. 0
ADP3510
–15–
To ensure proper operation, the minimum VGS the ADP3510
can provide must be enough to turn on the FET. The available
gate drive voltage can be estimated using the following:
V
V
V
V
GS
ADAPTER MIN
SENSE
GATEDR
=
-
-
(
)
(11)
where:
V
ADAPTER(MIN)
is the minimum adapter voltage.
V
DIODE
is the maximum forward drop of the charger diode, D1.
V
GATEDR
is the gate drive “low” voltage, 0.5 V.
V
SENSE
is the maximum high current limit threshold voltage.
The difference between the adapter voltage (V
ADAPTER
) and the
final battery voltage (VBAT) must exceed the voltage drop due to
the blocking diode, the sense resistor, and the ON resistance of
the FET at maximum charge current.
V
V
V
V
V
DS
ADAPTER MIN
DIODE
SENSE
BAT
=
-
-
-
(
)
(12)
Then the RDS(ON) of the FET can be calculated.
R
V
I
DS ON
(
DS
CHR MAX
(
)
)
=
(13)
The thermal characteristics of the FET must be considered
next. The worst-case dissipation can be determined using:
(
It should be noted that the adapter voltage can be either preregulated
or nonregulated. In the preregulated case, the difference between
the maximum and minimum adapter voltage is probably not sig-
nificant. In the unregulated case, the adapter voltage can have a
wide range specified. However, the maximum voltage specified is
usually with no load applied. So, the worst-case power dissipation
calculation will often lead to an over-specified pass device. In
either case, it is best to determine the load characteristics of the
adapter to optimize the charger design.
For example:
V
ADAPTER(MIN)
= 5.0 V
V
ADAPTER(MAX)
= 6.5 V
V
DIODE
= 0.5 V at 850 mA
V
GATEDR
= 0.5 V
V
SENSE
= 170 mV
V
GS
= 5 V – 0.5 V – 0.170 V = 4.3 V.
So choose a low-threshold voltage FET.
P
V
V
V
UVLO
I
DISS
ADAPTER MAX
DIODE
SENSE
CHR
=
-
-
-
)
￥
(
)
(14)
V
V
V
V
V
DS
ADAPTER MIN
DIODE
SENSE
BAT
=
-
-
-
(
)
(15)
= 5 V – 0.5 V – 0.170 V – 4.2 V
= 130 mV
R
V
I
mV
mV
DS ON
(
DS
CHR MAX
(
)
)
=
=
130
850
(16)
= 153 m
W
P
V
(
(
V
V
UVLO
I
DISS
ADAPTER MAX
DIODE
SENSE
CHR
=
-
-
-
)
￥
(
)
P
V
V
V
A
W
DISS
=
-
-
-
)
￥
=
6 5
.
0 5
.
0 170
.
3 2
.
0 85
/
2 24
.
Appropriate PMOS FETs are available from the following vendors:
Siliconix
IR
Fairchild
Charger Diode Selection
The diode, D1, shown in Figure 3, is used to prevent the battery
from discharging through the PMOS’ body diode into the charger’s
internal bias circuits. A Schottky diode is recommended to
minimize the voltage difference from the charger to the battery
and the power dissipation. Choose a diode with a current rating
high enough to handle the battery charging current, a voltage
rating greater than VBAT, and a low leakage current. The blocking
diode is required for both lithium and nickel battery types.
Printed Circuit Board Layout Considerations
Use the following general guidelines when designing printed
circuit boards:
1. Connect the battery to the VBAT and VBAT2 pins of the
ADP3510. Locate the input capacitor as close to the pins as
possible.
2. VAN and VTCXO capacitors should be returned to AGND.
3. VCORE, VMEM, and VIO capacitors should be returned to
DGND.
4. Split the ground connections. Use separate traces or planes for
the analog, digital, and power grounds and tie them together
at a single point, preferably close to the battery return.
5. Run a separate trace from the BATSNS pin to the battery to
prevent voltage drop error in the MVBAT measurement.
6. Kelvin connect the charger’s sense resistor by running separate
traces to the CHRIN pin and ISENSE pin. Make sure that the
traces are terminated as close to the resistor’s body as possible.
7. Use the best industry practice for thermal considerations during
the layout of the ADP3510 and charger components. Careful
use of copper area, weight, and multilayer construction all
contribute to improved thermal performance.
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