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參數(shù)資料
型號(hào): ADSP-2109
廠商: Analog Devices, Inc.
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection
中文描述: 無電容,NMOS管,150mA的低壓差穩(wěn)壓器的反向電流保護(hù)
文件頁數(shù): 10/36頁
文件大小: 333K
代理商: ADSP-2109
ADSP-2104/ADSP-2109
–10–
REV. 0
Instruction Set
T he ADSP-2104/ADSP-2109 assembly language uses an algebraic
syntax for ease of coding and readability. T he sources and
destinations of computations and data movements are written
explicitly in each assembly statement, eliminating cryptic
assembler mnemonics.
Every instruction assembles into a single 24-bit word and
executes in a single cycle. T he instructions encompass a wide
variety of instruction types along with a high degree of
operational parallelism. T here are five basic categories of
instructions: data move instructions, computational instruc-
tions, multifunction instructions, program flow control instruc-
tions and miscellaneous instructions. Multifunction instructions
perform one or two data moves and a computation.
T he instruction set is summarized below. T he
ADSP-2100
Family Users Manual
contains a complete reference to the
instruction set.
ALU Instructions
[IF cond]
AR|AF
=
=
=
=
=
=
=
=
=
=
=
=
=
=
xop + yop [+ C] ;
xop – yop [+ C– 1] ;
yop – xop [+ C– 1] ;
xop AND yop ;
xop OR yop ;
xop X OR yop ;
PASS xop ;
– xop ;
NOT xop ;
ABS xop ;
yop + 1 ;
yop – 1 ;
DIVS yop, xop ;
DIVQ xop ;
Add/Add with Carry
Subtract X – Y/Subtract X – Y with Borrow
Subtract Y – X /Subtract Y – X with Borrow
AND
OR
X OR
Pass, Clear
Negate
NOT
Absolute Value
Increment
Decrement
Divide
MAC Instructions
[IF cond]
MR|MF
=
=
=
=
=
xop * yop ;
MR + xop * yop ;
MR – xop * yop ;
MR ;
0 ;
Multiply
Multiply/Accumulate
Multiply/Subtract
Transfer MR
Clear
Conditional MR Saturation
IF MV SAT MR ;
Shifter Instructions
[IF cond]
SR = [SR OR] ASHIFT xop ;
[IF cond]
SR = [SR OR] LSHIFT xop ;
SR = [SR OR] ASHIFT xop BY <exp>;
SR = [SR OR] LSHIFT xop BY <exp>;
[IF cond]
SE = EX P xop ;
[IF cond]
SB = EX PADJ xop ;
[IF cond]
SR = [SR OR] NORM xop ;
Arithmetic Shift
Logical Shift
Arithmetic Shift Immediate
Logical Shift Immediate
Derive Exponent
Block Exponent Adjust
Normalize
Data Move Instructions
reg = reg ;
reg = <data> ;
reg = DM (<addr>) ;
dreg = DM (Ix , My) ;
dreg = PM (Ix , My) ;
DM (<addr>) = reg ;
DM (Ix , My) = dreg ;
PM (Ix , My) = dreg ;
Register-to-Register Move
Load Register Immediate
Data Memory Read (Direct Address)
Data Memory Read (Indirect Address)
Program Memory Read (Indirect Address)
Data Memory Write (Direct Address)
Data Memory Write (Indirect Address)
Program Memory Write (Indirect Address)
Multifunction Instructions
<ALU>|<MAC>|<SHIFT > , dreg = dreg ;
<ALU>|<MAC>|<SHIFT > , dreg = DM (Ix , My) ;
<ALU>|<MAC>|<SHIFT > , dreg = PM (Ix , My) ;
DM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT > ;
PM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT > ;
dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
<ALU>|<MAC> , dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
Computation with Register-to-Register Move
Computation with Memory Read
Computation with Memory Read
Computation with Memory Write
Computation with Memory Write
Data & Program Memory Read
ALU/MAC with Data & Program Memory Read
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