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參數資料
| 型號： | ADSP-2171BST-104 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 24-BIT, 13 MHz, OTHER DSP, PQFP128 |
| 封裝： | PLASTIC, TQFP-128 |
| 文件頁數： | 2/52頁 |
| 文件大小： | 664K |
| 代理商： | ADSP-2171BST-104 |
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REV. A
–2–
ADSP-2171/ADSP-2172/ADSP-2173
Development System
T he ADSP-2100 Family Development Software, a complete set
of toolsfor softwareand hardwaresystem development, supports
the ADSP-217x. T he System Builder provides a high-level
method for defining the architecture of systems under develop-
ment. T heAssembler hasan algebraic syntax that iseasy to
program and debug. T he Linker combines object files into
an executable file. T he Simulator provides an interactive
instruction-level simulation with a reconfigurable user interface
to display different portions of the hardware environment. A
PROM Splitter generates PROM programmer compatible files.
T he C Compiler, based on the Free Software Foundation’s
GNU C Compiler, generates ADSP-217x assembly source
code. T he Runtime Library includes over 100 ANSI-standard
mathematical and DSP-specific functions.
EZ-T ools, low cost, easy-to-use hardware tools, also support the
ADSP-217x.
T he ADSP-217x EZ-ICE
Emulator aids in the hardware de-
bugging of ADSP-217x systems. T he emulator consists of hard-
ware, host computer resident software, the emulator probe, and
the pin adaptor. T he emulator performs a full range of emula-
tion functions including stand-alone operation or operation in
the target, setting up to 20 breakpoints, single-step or full-speed
operation in the target, examining and altering registers and
memory values, and PC upload/download functions. If you plan
to use the emulator, you should consider the emulator’s restric-
tions (differences between emulator and processor operation).
T he EZ-LAB
Evaluation Board is a PC plug-in card, but it can
operate in stand-alone mode. T he evaluation board/system de-
velopment board executes EPROM-based or downloaded pro-
grams. Modular Analog Front End daughter cards with different
codecs will be made available.
EZ-ICE and EZ-LAB are registered trademarks of Analog Devices, Inc.
Additional Information
T his data sheet provides a general overview of ADSP-217x
functionality. For additional information on the architecture and
instruction set of the processor, refer to the
ADSP-2100 Family
User’s Manual
. For more information about the Development
System and ADSP-217x programmer’s reference information,
refer to the
ADSP-2100 Family Assembler Tools & Simulator
Manual
.
ARCHIT E CT URE OVE RVIE W
Figure 1 is an overall block diagram of the ADSP-217x. T he
processor contains three independent computational units: the
ALU, the multiplier/accumulator (MAC) and the shifter. T he
computational units process 16-bit data directly and have provi-
sions to support multiprecision computations. T he ALU per-
forms a standard set of arithmetic and logic operations; division
primitives are also supported. T he MAC performs single-cycle
multiply, multiply/add and multiply/subtract operations with
40 bits of accumulation. T he shifter performs logical and
arithmetic shifts, normalization, denormalization, and derive
exponent operations. T he shifter can be used to efficiently
implement numeric format control including multiword and
block floating-point representations.
T he internal result (R) bus directly connects the computational
units so that the output of any unit may be the input of any unit
on the next cycle.
A powerful program sequencer and two dedicated data address
generators ensure efficient delivery of operands to these compu-
tational units. T he sequencer supports conditional jumps, sub-
routine calls and returns in a single cycle. With internal loop
counters and loop stacks, the ADSP-217x executes looped code
with zero overhead; no explicit jump instructions are required to
maintain the loop.
Figure 1. ADSP-217x Block Diagram
R BUS
16
HIP
CONTROL
HIP
REGISTERS
BOOT
ADDRESS
GENERATOR
BUS
EXCHANGE
COMPANDING
CIRCUITRY
DMA BUS
PMA BUS
DMD BUS
PMD BUS
PROGRAM
SEQUENCER
INSTRUCTION
REGISTER
DATA
ADDRESS
GENERATOR
#2
DATA
ADDRESS
GENERATOR
#1
14
14
INPUT REGS
OUTPUT REGS
SHIFTER
INPUT REGS
OUTPUT REGS
MAC
INPUT REGS
OUTPUT REGS
ALU
24
16
5
16
MUX
24
MUX
SERIAL
PORT 0
RECEIVE REG
TRANSMIT REG
CONTROL
LOGIC
DATA
SRAM
2K X 16
POWER DOWN
CONTROL
LOGIC
14
TIMER
2
3
11
HIP
DATA
BUS
PROGRAM ROM
8K X 24
PROGRAM SRAM
2K X 24
SERIAL
PORT 1
RECEIVE REG
TRANSMIT REG
FLAGS
EXTERNAL
DATA
BUS
EXTERNAL
ADDRESS
BUS
5
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相關代理商/技術參數 |
參數描述 |
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| ADSP-2171BST-133 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 33.33MHz 33MIPS 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:16BIT FXD PT PROC 33 MIPS - Bulk 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
| ADSP-2171BSTZ-133 | 功能描述:IC DSP CONTROLLER 16BIT 128TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-2171BSZ-133 | 功能描述:IC DSP CONTROLLER 16BIT 128PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:ADSP-21xx 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，FCBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-2171KS-104 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 26MHz 26MIPS 128-Pin PQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADSP-2171KS-133 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 33.33MHz 33MIPS 128-Pin PQFP 制造商:Rochester Electronics LLC 功能描述:16BIT FXD PT PROC 33MIPS - Bulk 制造商:Analog Devices 功能描述:DSP microcomputer 33.33 MHz speed 1 ti |
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