- 您現在的位置：買賣IC網 > PDF目錄374035 > ADSP-2183KST-160 (ANALOG DEVICES INC) DSP Microcomputer PDF資料下載
參數資料
| 型號： | ADSP-2183KST-160 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 24-BIT, 20 MHz, OTHER DSP, PQFP128 |
| 封裝： | METRIC, PLASTIC, TQFP-128 |
| 文件頁數： | 14/31頁 |
| 文件大小： | 252K |
| 代理商： | ADSP-2183KST-160 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
ADSP-2183
–14–
REV. C
Parameter
Min
Max
Unit
Clock Signals and Reset
Timing Requirements
:
t
CKI
t
CKIL
t
CKIH
Switching Characteristics
:
t
CKL
t
CKH
t
CKOH
CLKIN Period
CLKIN Width Low
CLKIN Width High
38
15
15
100
ns
ns
ns
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
0.5t
CK
– 7
0.5t
CK
– 7
0
ns
ns
ns
20
Control Signals
Timing Requirement
:
t
RSP
RESET
Width Low
5t
CK1
ns
NOTE
1
Applies after power-up sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal
oscillator start-up time).
CLKIN
CLKOUT
t
CKIL
t
CKOH
t
CKH
t
CKL
t
CKIH
t
CKI
Figure 8. Clock Signals
Parameter
Min
Max
Unit
Interrupts and Flag
Timing Requirements
:
t
IFS
t
IFH
Switching Characteristics
:
t
FOH
t
FOD
IRQx
, FI, or PFx Setup before CLKOUT Low
1, 2, 3, 4
IRQx
, FI, or PFx Hold after CLKOUT High
1, 2, 3, 4
0.25t
CK
+ 15
0.25t
CK
ns
ns
Flag Output Hold after CLKOUT Low
5
Flag Output Delay from CLKOUT Low
5
0.5t
CK
– 7
ns
ns
0.5t
CK
+ 6
NOTES
1
If
IRQx
and FI inputs meet t
and t
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
the following cycle. (Refer to Interrupt Controller Operation in the Program Control chapter of the User’s Manual for further information on interrupt servicing.)
2
Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3
IRQx
=
IRQ0
,
IRQ1
,
IRQ2
,
IRQL0
,
IRQL1
,
IRQE
.
4
PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
5
Flag outputs = PFx, FL0, FL1, FL2, Flag_out4.
t
FOD
t
FOH
t
IFS
CLKOUT
FLAG
OUTPUTS
IRQx
FI
PFx
t
IFH
Figure 9. Interrupts and Flags
相關PDF資料 |
PDF描述 |
|---|---|
| ADSP-2183KCA-210 | DSP Microcomputer |
| ADSP-2183KST-210 | DSP Microcomputer |
| ADSP-2183 | LM2941/LM2941C 1A Low Dropout Adjustable Regulator; ; Container: Tray |
| ADSP-2183BST-160 | DSP Microcomputer |
| ADSP-2183BST-115 | DSP Microcomputer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-2183KST-210 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 52MHz 52MIPS 128-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:3.3V 16BITDSP,52MIPS,16KWORDSPM/DM,128TQ - Bulk 制造商:Analog Devices 功能描述:Digital Signal Processor IC |
| ADSP-2183KST-210X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| ADSP-2183KSTZ-115 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 28.8MHz 28.8MIPS 128-Pin LQFP |
| ADSP-2183KSTZ-133 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 33.3MHz 33.3MIPS 128-Pin LQFP |
| ADSP-2183KSTZ-160 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 40MHz 40MIPS 128-Pin LQFP |
發布緊急采購，3分鐘左右您將得到回復。