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參數(shù)資料
| 型號： | ADSP-2183KST-160 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 24-BIT, 20 MHz, OTHER DSP, PQFP128 |
| 封裝： | METRIC, PLASTIC, TQFP-128 |
| 文件頁數(shù)： | 4/31頁 |
| 文件大小： | 252K |
| 代理商： | ADSP-2183KST-160 |
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ADSP-2183
–4–
REV. C
SPORTs support serial data word lengths from 3 to 16 bits
and provide optional A-law and
μ
-law companding according
to CCITT recommendation G.711.
SPORT receive and transmit sections can generate unique
interrupts on completing a data word transfer.
SPORTs can receive and transmit an entire circular buffer of
data with only one overhead cycle per data word. An interrupt
is generated after a data buffer transfer.
SPORT0 has a multichannel interface to selectively receive
and transmit a 24 or 32 word, time-division multiplexed,
serial bitstream.
SPORT1 can be configured to have two external interrupts
(
IRQ0
and
IRQ1
) and the Flag In and Flag Out signals. The
internally generated serial clock may still be used in this
configuration.
Pin Descriptions
The ADSP-2183 is available in a 128-lead LQFP package, and
Mini-BGA.
PIN FUNCTION DESCRIPTIONS
#
of
Input/
Pins
Output Function
14
O
Address Output Pins for Program,
Data, Byte, & I/O Spaces
24
I/O
Data I/O Pins for Program and
Data Memory Spaces (8 MSBs
Are Also Used as Byte Space
Addresses)
1
I
Processor Reset Input
1
I
Edge- or Level-Sensitive
Interrupt Request
Pin
Name(s)
Address
Data
RESET
IRQ2
IRQL0
,
IRQL1
2
I
Level-Sensitive Interrupt
Requests
Edge-Sensitive Interrupt
Request
Bus Request Input
Bus Grant Output
Bus Grant Hung Output
Program Memory Select Output
Data Memory Select Output
Byte Memory Select Output
I/O Space Memory Select Output
Combined Memory Select Output
Memory Read Enable Output
Memory Write Enable Output
Memory Map Select Input
Boot Option Control Input
IRQE
1
I
BR
BG
BGH
PMS
DMS
BMS
IOMS
CMS
RD
WR
MMAP
BMODE
CLKIN,
XTAL
1
1
1
1
1
1
1
1
1
1
1
1
I
O
O
O
O
O
O
O
O
O
I
I
2
I
Clock or Quartz Crystal Input
#
of
Pins
Pin
Name(s)
Input/
Output Function
CLKOUT
SPORT0
SPORT1
1
5
5
O
I/O
I/O
Processor Clock Output.
Serial Port I/O Pins
Serial Port 1
or
Two External
IRQ
s, Flag In and Flag Out
IDMA Port Read/Write Inputs
IDMA Port Select
IDMA Port Address Latch
Enable
IDMA Port Address/Data Bus
IDMA Port Access Ready
Acknowledge
Power-Down Control
Power-Down Control
IRD
,
IWR
IS
IAL
2
1
1
I
I
I
IAD
IACK
16
1
I/O
O
PWD
PWDACK
FL0, FL1,
FL2
PF7:0
EE
EBR
EBG
ERESET
EMS
EINT
ECLK
ELIN
ELOUT
GND
VDD
GND
VDD
1
1
I
O
3
8
1
1
1
1
1
1
1
1
1
11
6
22
11
O
I/O
*
*
*
*
*
*
*
*
*
Output Flags
Programmable I/O Pins
(Emulator Only*)
(Emulator Only*)
(Emulator Only*)
(Emulator Only*)
(Emulator Only*)
(Emulator Only*)
(Emulator Only*)
(Emulator Only*)
(Emulator Only*)
Ground Pins (LQFP)
Power Supply Pins (LQFP)
Ground Pins (Mini-BGA)
Power Supply Pins (Mini-BGA)
*These ADSP-2183 pins must be connected
only
to the EZ-ICE connector in
the target system. These pins have no function except during emulation, and
do not require pull-up or pull-down resistors.
Interrupts
The interrupt controller allows the processor to respond to the
eleven possible interrupts and reset with minimum overhead.
The ADSP-2183 provides four dedicated external interrupt
input pins,
IRQ2
,
IRQL0
,
IRQL1
and
IRQE
. In addition,
SPORT1 may be reconfigured for
IRQ0
,
IRQ1
, FLAG_IN and
FLAG_OUT, for a total of six external interrupts. The ADSP-
2183 also supports internal interrupts from the timer, the byte
DMA port, the two serial ports, software and the power-down
control circuit. The interrupt levels are internally prioritized and
individually maskable (except power-down and reset). The
IRQ2
,
IRQ0
and
IRQ1
input pins can be programmed to be
either level- or edge-sensitive.
IRQL0
and
IRQL1
are level-
sensitive and
IRQE
is edge sensitive. The priorities and vector
addresses of all interrupts are shown in Table I.
相關(guān)PDF資料 |
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| ADSP-2183KCA-210 | DSP Microcomputer |
| ADSP-2183KST-210 | DSP Microcomputer |
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| ADSP-2183BST-160 | DSP Microcomputer |
| ADSP-2183BST-115 | DSP Microcomputer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2183KST-210 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 52MHz 52MIPS 128-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:3.3V 16BITDSP,52MIPS,16KWORDSPM/DM,128TQ - Bulk 制造商:Analog Devices 功能描述:Digital Signal Processor IC |
| ADSP-2183KST-210X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| ADSP-2183KSTZ-115 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 28.8MHz 28.8MIPS 128-Pin LQFP |
| ADSP-2183KSTZ-133 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 33.3MHz 33.3MIPS 128-Pin LQFP |
| ADSP-2183KSTZ-160 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 40MHz 40MIPS 128-Pin LQFP |
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