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參數(shù)資料
| 型號： | ADSP-2184L |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | LM2941/LM2941C 1A Low Dropout Adjustable Regulator; Package: TO-220; No of Pins: 5; Qty per Container: 45; Container: Rail |
| 中文描述： | DSP的微機 |
| 文件頁數(shù)： | 13/31頁 |
| 文件大小： | 216K |
| 代理商： | ADSP-2184L |
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–13–
REV. 0
ADSP-2184L
RECOMMENDED OPERATING CONDITIONS
B Grade
Min
Parameter
Max
Unit
V
DD
T
AMB
3.0
–40
3.6
+85
V
°
C
ELECTRICAL CHARACTERISTICS
B Grade
Typ
Parameter
Test Conditions
Min
Max
Unit
V
IH
V
IH
V
IL
V
OH
Hi-Level Input Voltage
1, 2
Hi-Level CLKIN Voltage
Lo-Level Input Voltage
1, 3
Hi-Level Output Voltage
1, 4, 5
@ V
DD
= max
@ V
DD
= max
@ V
DD
= min
@ V
DD
= min
I
OH
= –0.5 mA
@ V
DD
= min
I
OH
= –100
μ
A
6
@ V
DD
= min
I
OL
= 2 mA
@ V
DD
= max
V
IN
= V
DD
max
@ V
DD
= max
V
IN
= 0 V
@ V
DD
= max
V
IN
= V
DD
max
8
@ V
DD
= max
V
IN
= 0 V
8
@ V
DD
= 3.3
@ V
DD
= 3.3
T
AMB
= +25
°
C
t
CK
= 25 ns
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= +25
°
C
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= +25
°
C
2.0
2.2
V
V
V
0.8
2.4
V
V
DD
– 0.3
V
V
OL
Lo-Level Output Voltage
1, 4, 5
0.4
V
I
IH
Hi-Level Input Current
3
10
μ
A
I
IL
Lo-Level Input Current
3
10
μ
A
I
OZH
Three-State Leakage Current
7
10
μ
A
I
OZL
Three-State Leakage Current
7
10
μ
A
mA
I
DD
I
DD
Supply Current (Idle)
9
Supply Current (Dynamic)
10, 11
8.6
42
mA
C
I
Input Pin Capacitance
3, 6, 12
8
pF
C
O
Output Pin Capacitance
6, 7, 12, 13
8
pF
NOTES
Bidirectional pins: D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, A1–A13, PF0–PF7.
2
Input only pins:
RESET
,
BR
, DR0, DR1,
PWD
.
3
Input only pins: CLKIN,
RESET
,
BR
, DR0, DR1,
PWD
.
4
Output pins:
BG
,
PMS
,
DMS
,
BMS
,
IOMS
,
CMS
,
RD
,
WR
, PWDACK, A0, DT0, DT1, CLKOUT, FL2–0,
BGH
.
5
Although specified for TTL outputs, all ADSP-2184L outputs are CMOS-compatible and will drive to V
DD
and GND, assuming no dc loads.
6
Guaranteed but not tested.
7
Three-statable pins: A0–A13, D0–D23,
PMS
,
DMS
,
BMS
,
IOMS
,
CMS
,
RD
,
WR
, DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RFS1, PF0–PF7.
8
0 V on
BR
.
9
Idle refers to ADSP-2184L state of operation during execution of IDLE instruction. Deasserted pins are driven to either V
or GND.
10
I
measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (types 1, 4, 5, 12, 13, 14), 30% are type 2
and type 6, and 20% are idle instructions.
11
V
= 0 V and 3 V. For typical figures for supply currents, refer to Power Dissipation section.
12
Applies to LQFP package type.
13
Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
SPECIFICATIONS
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