- 您現在的位置：買賣IC網 > PDF目錄374037 > ADSP-21990BST (ANALOG DEVICES INC) 16-bit fixed point DSP with Flash PDF資料下載
參數資料
| 型號： | ADSP-21990BST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 16-BIT, 160 MHz, OTHER DSP, PQFP176 |
| 封裝： | MS-026BGA, LQFP-176 |
| 文件頁數： | 34/44頁 |
| 文件大?。?/td> | 574K |
| 代理商： | ADSP-21990BST |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
ADSP-21990
–34–
REV. 0
Power Dissipation
Total power dissipation has two components, one due to internal
circuitry and one due to the switching of external output drivers.
Internal power dissipation is dependent on the instruction
execution sequence and the data operands involved.
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
Number of output pins that switch during each cycle (O)
The maximum frequency at which they can switch (f)
Their load capacitance (C)
Their voltage swing (V
DD
)
and is calculated by the formula below.
The load capacitance includes the processor package capacitance
(C
IN
). The switching frequency includes driving the load high
and then back low. Address and data pins can drive high and low
at a maximum rate of 1/(2t
CK
). The write strobe can switch every
cycle at a frequency of 1/t
CK
. Select pins switch at 1/(2t
CK
), but
selects can switch on each cycle. For example, estimate P
EXT
with
the following assumptions:
A system with one bank of external data memory—asyn-
chronous RAM (16-bit)
One 64K 16 RAM chip is used with a load of 10 pF
Maximum peripheral speed CCLK = 80 MHz, HCLK =
80 MHz
External data memory writes occur every other cycle, a
rate of 1/(4t
HCLK
), with 50% of the pins switching
The bus cycle time is 80 MHz (t
HCLK
= 12.5 ns)
The P
EXT
equation is calculated for each class of pins that can
drive as shown in
Table 15
.
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation with the
following formula.
P
TOTAL
P
=
Where:
P
EXT
is from
Table 15
.
P
INT
is I
DDINT
2.5 V, using the calculation I
DDINT
listed
in
Power Dissipation
.
Note that the conditions causing a worst-case P
EXT
are different
from those causing a worst-case P
INT
. Maximum P
INT
cannot
occur while 100% of the output pins are switching from all ones
to all zeros. Note also that it is not common for an application to
have 100% or even 50% of the outputs switching simultaneously.
Test Conditions
The DSP is tested for output enable, disable, and hold time.
Output Disable Time
Output pins are considered to be disabled when they stop driving,
go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by
V is dependent on the capacitive load, C
L
and the
load current, I
L
. This decay time can be approximated by the
following equation.
The output disable time t
DIS
is the difference between t
MEASURED
and t
DECAY
as shown in
Figure 18
. The time t
MEASURED
is the
interval from when the reference signal switches to when the
output voltage decays
V from the measured output high or
output low voltage. The t
DECAY
is calculated with test loads C
L
and
I
L
, and with
V equal to 0.5 V.
P
EXT
O
C
×
V
DD
2
×
f
×
=
Table 15. P
EXT
Calculation Example
Pin Type
Number of Pins
% Switching
C
f
V
DD2
10.9 V
10.9 V
10.9 V
10.9 V
10.9 V
= P
EXT
= 0.01635 W
= 0.0 W
= 0.00436 W
= 0.01744 W
= 0.00872 W
=0.04687 W
Address
MSx
WR
Data
CLKOUT
15
1
1
16
1
50
0
10 pF
10 pF
10 pF
10 pF
10 pF
20 MHz
20 MHz
40 MHz
20 MHz
80 MHz
50
EXT
P
INT
+
Figure 18. Output Enable/Disable
t
DECAY
C
V
I
L
---------------
=
REFERENCE
SIGNAL
t
DIS
OUTPUT STARTS
DRIVING
V
OH (MEASURED)
–
V 2.0V
V
OL (MEASURED)
+
V 1.0V
t
MEASURED
V
OH (MEASURED)
V
OL (MEASURED)
HIGH IMPEDANCE STATE.
TEST CONDITIONS CAUSE THIS VOLTAGE
TO BE APPROXIMATELY 1.5V
OUTPUT STOPS
DRIVING
t
DECAY
t
ENA
相關PDF資料 |
PDF描述 |
|---|---|
| ADSP-21MOD870-100 | Single Chip Digital Modem(單片數字調制解調器) |
| ADSP-21MOD870-110 | Internet Gateway Processor Software |
| ADSP-21MOD870 | Internet Gateway Processor |
| ADSP-21MOD870-000 | Internet Gateway Processor |
| ADSP-21XX1111 | ADSP-2100 Family DSP Microcomputers |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-21990BSTZ | 功能描述:IC DSP CONTROLLER 16BIT 176-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21991BBC | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 150MHz 150MIPS 196-Pin Mini-BGA |
| ADSP-21991BBCZ | 功能描述:IC DSP CTLR 16BIT 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21991BST | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 160MHz 160MIPS 176-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:HIGH PERFORMANCE MIXED SIGNAL DSP - Bulk |
| ADSP-21991BSTZ | 功能描述:IC DSP CONTROLLER 16BIT 176-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
發布緊急采購，3分鐘左右您將得到回復。