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參數資料
| 型號： | ADSP-BF532SBST400 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | 28-2 (14 Contacts) Pin Insert; For Use With:Amphenol MIL-C-5015 97 Series Circular Connectors; No. of Contacts:14; Gender:Male; Operating Voltage:1250V |
| 中文描述： | 16-BIT, 40 MHz, OTHER DSP, PQFP176 |
| 封裝： | 24 X 24 MM, LQFP-176 |
| 文件頁數： | 41/56頁 |
| 文件大小： | 671K |
| 代理商： | ADSP-BF532SBST400 |
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ADSP-BF531/ADSP-BF532/ADSP-BF533
Rev. 0
|
Page 41 of 56
|
March 2004
POWER DISSIPATION
Total power dissipation has two components: one due to inter-
nal circuitry (P
INT
) and one due to the switching of external
output drivers (P
EXT
).
Table 32
shows the power dissipation for
internal circuitry (V
DDINT
). Internal power dissipation is depen-
dent on the instruction execution sequence and the data
operands involved.
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
Number of output pins (O) that switch during each cycle
Maximum frequency (f) at which they can switch
Their load capacitance (C)
Their voltage swing (V
DDEXT
)
The external component is calculated using:
The frequency f includes driving the load high and then back
low. For example: DATA15–0 pins can drive high and low at a
maximum rate of 1/(2
t
SCLK
) while in SDRAM burst mode.
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
Note that the conditions causing a worst-case P
EXT
differ from
those causing a worst-case P
INT
. Maximum P
INT
cannot occur
while 100% of the output pins are switching from all ones (1s) to
all zeros (0s). Note, as well, that it is not common for an applica-
tion to have 100% or even 50% of the outputs switching
simultaneously.
Table 32. Internal Power Dissipation
1
1
See EE-229: Estimating Power for ADSP-BF533 Blackfin Processors.
2
I
DD
data is specified for typical process parameters. All data at 25oC.
3
Processor executing 75% dual Mac, 25% ADD with moderate data bus activity.
4
See the
ADSP-BF53x Blackfin Processor Hardware Reference Manual
for defini-
tions of Sleep and Deep Sleep operating modes.
5
Measured at V
DDEXT
= 3.65V with voltage regulator off (V
DDINT
= 0V).
6
Measured at V
DDRTC
= 3.3V at 25oC.
Test Conditions
2
f
CCLK
=
50 MHz
V
DDINT
=
0.8 V
26
16
14
50
30
Parameter
f
CCLK
=
400 MHz
V
DDINT
=
1.2 V
160
37
31
f
CCLK
=
500 MHz
V
DDINT
=
1.2 V
190
37
31
f
CCLK
=
600 MHz
V
DDINT
=
1.2 V
220
37
31
Unit
I
DDTYP
3
I
DDSLEEP
4
I
DDDEEPSLEEP
4
I
DDHIBERNATE
5
I
DDRTC
6
mA
mA
mA
A
A
P
EXT
O
C
×
V
2
DD
×
f
×
=
P
TOTAL
P
EXT
I
DD
V
DDINT
×
(
)
+
=
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| ADSP-BF532SBST-DAB | 制造商:Analog Devices 功能描述: |
| ADSP-BF532SBSTZ400 | 功能描述:IC DSP CTLR 16BIT 400MHZ 176LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:Blackfin® 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，FCBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-BF532SBSTZ4RL | 功能描述:IC DSP CTLR 16BIT 400MHZ 176LQFP 制造商:analog devices inc. 系列:Blackfin? 包裝:帶卷（TR） 零件狀態:有效 類型:定點 接口:SPI，SSP，UART 時鐘速率:400MHz 非易失性存儲器:ROM（1 kB） 片載 RAM:84kB 電壓 - I/O:3.30V 電壓 - 內核:1.20V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:表面貼裝 封裝/外殼:176-LQFP 供應商器件封裝:176-LQFP（24x24） 標準包裝:450 |
| ADSP-BF532SBSTZENG | 制造商:Analog Devices 功能描述: |
| ADSP-BF533 | 制造商:Analog Devices 功能描述: |
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