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參數(shù)資料
型號: ADUC7026BST62
廠商: ANALOG DEVICES INC
元件分類: 微控制器/微處理器
英文描述: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
中文描述: 32-BIT, FLASH, 45.5 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, LQFP-80
文件頁數(shù): 26/80頁
文件大小: 840K
代理商: ADUC7026BST62
ADuC702x Series
Preliminary Technical Data
ADC CIRCUIT INFORMATION
GENERAL OVERVIEW
Rev. PrB | Page 26 of 80
The Analog Digital Converter (ADC) incorporates a fast, multi-
channel, 12-bit ADC. It can operate from 2.7V to 3.6V supplies
and is capable of providing a throughput of up to 1MSPS when
the clock source is 45MHz. This block provides the user with
multi-channel multiplexer, differential track-and-hold, on-chip
reference and ADC.
The ADC consists of a 12-bit successive-approximation
converter based around two capacitor DACs. It can operate in
one of three different modes, depending on the input signal
configuration :
fully differential mode
, for small and balanced signals
single-ended mode
, for any single-ended signals
pseudo-differential mode
, for any single-ended signals,
taking advantage of the common mode rejection
offered by the pseudo differential input.
The converter accepts an analog input range of 0 to V
REF
when
operating in single-ended mode or pseudo-differential mode. In
fully differential mode, the input signal must be balanced
around a common mode voltage
V
CM
, in the range 0V to AV
DD
and with a maximum amplitude of 2 V
REF
(see Figure 7).
Figure 7: examples of balanced signals for fully differential mode
A high precision, low drift, and factory calibrated 2.5 V
reference is provided on-chip. An external reference can also
be
connected as described later.
Single or continuous conversion modes can be initiated in
software. An external CONV
START
pin, an output generated from
the on-chip PLA or a Timer1 or a Timer2 overflow can also be
used to generate a repetitive trigger for ADC conversions.
A voltage output from an on-chip bandgap reference
proportional to absolute temperature can also be routed
through the front end ADC multiplexer (effectively an
additional ADC channel input) facilitating an internal
temperature sensor channel, measuring die temperature to an
accuracy of
±
3
°
C.
ADC TRANSFER FUNCTION
Pseudo-differential and single-ended modes
In pseudo-differential or single-ended mode, the input range is
0 V to V
REF
. The output coding is straight binary in pseudo
differential and single-ended modes with 1 LSB = FS/4096 or
2.5 V/4096 = 0.61 mV or 610
μ
V when V
REF
= 2.5 V. The ideal
code transitions occur midway between successive integer LSB
values (i.e. 1/2 LSB, 3/2 LSBs, 5/2 LSBs, . . ., FS –3/2 LSBs). The
ideal input/output transfer characteristic is shown in Figure 8.
OUTPUT
CODE
1111 1111 1111
1111 1111 1110
1111 1111 1101
1111 1111 1100
0000 0000 0011
0000 0000 0010
0000 0000 0001
0000 0000 0000
0V
1LSB
+FS - 1LSB
VOLTAGE INPUT
1LSB =
FS
4096
Figure 8: ADC transfer function in pseudo differential mode or single-ended
mode
Fully differential mode
The amplitude of the differential signal is the difference
between the signals applied to the V
IN+
and V
IN–
pins (i.e., V
IN+
V
IN–
). The maximum amplitude of the differential signal is
therefore –V
REF
to +V
REF
p-p (i.e. 2 X
V
REF
). This is regardless of
the common mode (CM). The common mode is the average of
the two signals, i.e. (V
IN+
+ V
IN–
)/2 and is therefore the voltage
that the two inputs are centred on. This results in the span of
each input being CM
±
V
REF
/2. This voltage has to be set up
externally and its range varies with V
REF
, (see driving the ADC).
The output coding is two’s complement in fully differential
mode with 1 LSB = 2V
REF
/4096 or 2x2.5 V/4096 = 1.22 mV
when V
REF
= 2.5 V. The designed code transitions occur midway
between successive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs,
5/2 LSBs, . . ., FS –3/2 LSBs). The ideal input/output transfer
characteristic is shown in Figure 9.
V
CM
2V
REF
V
CM
2V
REF
V
CM
2V
REF
AV
DD
0
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