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參數資料
| 型號： | ADV7162KS220 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顯示控制器 |
| 英文描述： | 96-Bit, 220 MHz True-Color Video RAM-DAC |
| 中文描述： | 1600 X 1200 PIXELS PALETTE-DAC DSPL CTLR, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數： | 39/44頁 |
| 文件大小： | 668K |
| 代理商： | ADV7162KS220 |
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ADV7160/ADV7162
REV. 0
–39–
Example
Color Mode: 24-Bit Gamma Corrected True Color (30-Bits) through Color Palette
Multiplexing: 2:1, Databus: 10-Bit, RAM-DAC Resolution: 10-Bit,
SYNC: on Green, Pedestal: 0 IRE, Calibration: Every Vertical Sync, Internal PLL: 220 MHz (Reference = 15 MHz)
Register Initialization
Write 07H to Mode Register (MR1)
Write 06H to Mode Register (MR1)
Write 07H to Mode Register (MR1)
Write 05H to Address Register (A7–A0)
Write 09H to Command Register 1 (CR1)
Write 06H to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write E4H to Command Reg 2 (CR2)
Write 07H to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write 40H to Command Reg 3 (CR3)
Write 08H to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write 00H to Command Reg 4 (CR4)
Write 0DH to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write 40H to Command Reg 5 (CR5)
Write 04H to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write FFH to Pixel Mask Register
Write 0FH to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write 09H to PLL V Register
Write 0CH to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write 01H to PLL R Register
Write 09H to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write 06H to PLL Command Register
C1 C0
1
1
1
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
R/
W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Comment
Resets ADV7162*
10-Bit Data Bus, 10-Bit DAC Resolution
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Address Reg points to Command Register 1 (CR1)
High byte access, Calibrate every Vertical Sync
Address Reg points to Command Register 2 (CR2)
24-Bit True Color, 0 IRE, Sync on Green
Address Reg points to Command Register 3 (CR3)
2:1 Muxing, PRGCKOUT = CLOCK
÷
4
Address Reg points to Command Register 4 (CR4)
DAC GAIN = 3996
Address Reg points to Command Register 5 (CR5)
Internal PLL to be used
Address Reg points to Pixel Mask Register
Set up Pixel Mask
Address Reg points to PLL V Register
Set up V value
Address Reg points to PLL R Register
Set up R value
Address Reg points to PLL Command Register (PCR)
Set up PCR as required
Color Palette RAM Initialization
Write 00H to Address Register (A7–A0)
Write 00H to Address Register (A10–A8)
Write 00H (red data) to RAM location (00H)
Write 00H (green data) to RAM location (00H)
Write 00H (blue data) to RAM location (00H)
Write 01H (red data) to RAM location (01H)
Write 01H (green data) to RAM location (01H)
Write 01H (blue data) to RAM location (01H)
C1 C0
0
0
0
0
0
0
0
0
.
.
0
0
0
R/
W
0
0
0
0
0
0
0
0
.
.
0
0
0
Comment
0
0
1
1
1
1
1
1
.
.
1
1
1
Points to Color Palette RAM
(Initializes Palette RAM
(to a Linear Ramp**
(
(
(
(
(
(
(
(
( RAM Initialization Complete
Write FFH (red data) to RAM location (FFH)
Write FFH (green data) to RAM location (FFH)
Write FFH (blue data) to RAM location (FFH)
*
*These command lines reset the ADV7162. The pipelines for each of the Red, Green & Blue pixel inputs are synchronously reset to the Multiplexer's “A” input.
Mode Register bit MR10 is written by a “1” followed by “0” followed by “1.”
**This sequence of instructions would, of course, normally be coded using some form of loop instruction.
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相關代理商/技術參數 |
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|---|---|
| ADV7162KSZ140 | 制造商:Analog Devices 功能描述:DAC 3-CH Segment 10-bit 160-Pin MQFP |
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| ADV7170 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management |
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