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參數(shù)資料
| 型號： | ADV7178 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| 中文描述： | 綜合數(shù)字無線電咨詢委員會，601到PAL / NTSC制式視頻編碼器 |
| 文件頁數(shù)： | 10/38頁 |
| 文件大?。?/td> | 280K |
| 代理商： | ADV7178 |
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ADV7177/ADV7178
–10–
REV. 0
PIN FUNCTION DESCRIPTIONS
Pin
No.
Input/
Output
Mnemonic
Function
1, 20, 28, 30
2
V
AA
CLOCK/2
P
O
+5 V Supply.
Synchronous Clock output signal. Can be either 27 MHz or 13.5 MHz; this
can be controlled by MR32 and MR33 in Mode Register 3.
8-Bit 4:2:2 Multiplexed YCrCb Pixel Port (P7–P0) or 16-Bit YCrCb
Pixel Port (P15–P0). P0 represents the LSB.
Enables OSD input data on the video outputs.
HSYNC
(Modes 1 and 2) Control Signal. This pin may be configured to
output (Master Mode) or accept (Slave Mode) Sync signals.
Dual Function FIELD (Mode 1) and
VSYNC
(Mode 2) Control Signal. This
pin may be configured to output (Master Mode) or accept (Slave Mode)
these control signals.
Video Blanking Control Signal. The pixel inputs are ignored when this is
Logic Level “0.” This signal is optional.
TTL Address Input. This signal sets up the LSB of the MPU address.
Ground Pin.
The input resets the on-chip timing generator and sets the ADV7177/ADV7178
into default mode. This is NTSC operation, Timing Slave Mode 0, 8-Bit
Operation, 2
×
Composite and S VHS out.
MPU Port Serial Interface Clock Input.
MPU Port Serial Data Input/Output.
Compensation Pin. Connect a 0.1
μ
F Capacitor from COMP to V
AA
.
DAC C Analog Output.
DAC B Analog Output.
DAC A Analog Output.
Voltage Reference Input for DACs or Voltage Reference Output (1.2 V).
A 300
resistor connected from this pin to GND is used to control full-scale
amplitudes of the Video Signals.
On Screen Display Inputs.
Crystal Oscillator output (to crystal). Leave unconnected if no crystal is used.
Crystal Oscillator input. If no crystal is used this pin can be driven by an
external TTL Clock source; it requires a stable 27 MHz reference Clock for
standard operation. Alternatively, a 24.52 MHz (NTSC) or 29.5 MHz (PAL)
can be used for square pixel operation.
3–10, 12–14,
37–41
11
15
P15–P0
I
OSD_EN
HSYNC
I
I/O
16
FIELD/
VSYNC
I/O
17
BLANK
I/O
18
19, 21, 29, 42
22
ALSB
GND
RESET
I
G
I
23
24
25
26
27
31
32
33
SCLOCK
SDATA
COMP
DAC C
DAC B
DAC A
V
REF
R
SET
I
I/O
O
O
O
O
I/O
I
34–36
43
44
OSD_0–2
CLOCK
CLOCK
I
O
I
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7178KS | Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7180 | 10-Bit, 4 x Oversampling SDTV Video Decoder |
| ADV7180BCPZ | 10-Bit, 4 x Oversampling SDTV Video Decoder |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7178KS | 制造商:Analog Devices 功能描述: |
| ADV7178KS-REEL | 制造商:Analog Devices 功能描述: |
| ADV7179 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179BCP | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 10-Bit 40-Pin LFCSP EP 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7179BCP1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
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