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參數資料
| 型號： | ADV7179KCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| 中文描述： | COLOR SIGNAL ENCODER, QCC40 |
| 封裝： | 6 X 6 MM, MO-220VJJD-2, LFCSP-40 |
| 文件頁數： | 37/52頁 |
| 文件大小： | 488K |
| 代理商： | ADV7179KCP |
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ADV7174/ADV7179
TELETEXT REQUEST CONTROL REGISTER (TC07)
Bits:
TC07–TC00
Address:
SR4–SR0 = 19H
Rev. A | Page 37 of 52
Teletext control register is an 8-bit-wide register (see Figure 50).
Table 17. Teletext Request Control Register
Bit Name
TTXREQ Rising Edge Control
Bit No.
TC07–TC04
Description
These bits control the position of the rising edge of TTXREQ. It can be
programmed from 0 CLOCK cycles to a maximum of 15 CLOCK cycles (see
Figure 50).
These bits control the position of the falling edge of TTXREQ. It can be
programmed from zero CLOCK cycles to a max of 15 CLOCK cycles. This controls
the active window for Teletext data. Increasing this value reduces the amount of
Teletext bits below the default of 360. If Bits TC03–TC00 are 00H when Bits TC07–
TC04 are changed, the falling edge of TTXREQ tracks that of the rising edge, i.e.,
the time between the falling and rising edge remains constant (see Figure 49).
TTXREQ Falling Edge Control
TC03–TC00
CGMS_WSS REGISTER 0 (C/W0)
Bits:
C/W07–C/W00
Address:
SR4–SR0 = 16H
CGMS_WSS Register 0 is an 8-bit-wide register. Figure 51 shows the operations under the control of this register.
TC01
TC00
TC07
TC02
TC04
TC03
TC05
TC06
TTXREQ RISING EDGE CONTROL
TC07 TC06
TC05 TC04
0
0
"
0
0
"
0
1
"
0
0
"
0 PCLK
1 PCLK
" PCLK
14 PCLK
15 PCLK
1
1
1
1
1
1
1
0
TTXREQ FALLING EDGE CONTROL
TC03 TC02
TC01 TC00
0 PCLK
1 PCLK
" PCLK
14 PCLK
15 PCLK
0
0
"
0
0
"
0
1
"
0
0
"
1
1
1
1
1
1
1
0
0
Figure 50. Teletext Control Register
C/W07
C/W06
C/W05
C/W04
C/W03
C/W02
C/W01
C/W00
C/W07
0
1
WIDE SCREEN
SIGNAL CONTROL
DISABLE
ENABLE
0
1
DISABLE
ENABLE
C/W05
CGMS ODD FIELD
CONTROL
C/W06
0
1
CGMS EVEN FIELD
CONTROL
DISABLE
ENABLE
C/W04
0
1
CGMS CRC CHECK
CONTROL
DISABLE
ENABLE
C/W03 – C/W00
CGMS DATA BITS
0
Figure 51. CGMS_WSS Register 0
Table 18. C/W0 Bit Description
Bit Name
CGMS Data Bits
Bit No.
C/W03–C/W00
Description
These four data bits are the final four bits of the CGMS data output stream. Note it is
CGMS data ONLY in these bit positions, i.e., WSS data does not share this location.
When this bit is enabled (1), the last six bits of the CGMS data, i.e., the CRC check
sequence, are calculated internally by the ADV7174/ADV7179. If this bit is disabled (0), the
CRC values in the register are output to the CGMS data stream.
When this bit is set (1), CGMS is enabled for odd fields. Note this is only valid in NTSC mode.
When this bit is set (1), CGMS is enabled for even fields. Note this is only valid in NTSC mode.
When this bit is set (1), wide screen signaling is enabled. Note this is only valid in PAL mode.
CGMS CRC Check Con
t
rol
C/W04
CGMS Odd Field Control
CGMS Even Field Control
WSS Control
C/W05
C/W06
C/W07
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相關代理商/技術參數 |
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| ADV7179KCP1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179KCP-REEL | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 10-Bit 40-Pin LFCSP EP T/R 制造商:Rochester Electronics LLC 功能描述:CHIP SCALE NTSC/PAL VID ENCODER APM I.C. - Tape and Reel |
| ADV7179KCP-REEL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179KCPZ | 功能描述:IC ENCODER VID NTSC/PAL 40LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統 電壓 - 電源，模擬:- 電壓 - 電源，數字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7179KCPZ2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
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