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參數資料
| 型號： | ADV7181BCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | COLOR SIGNAL DECODER, QCC64 |
| 封裝： | 9 X 9 MM, LEAD FREE, MO-220-VMMD, LFCSP-64 |
| 文件頁數： | 83/96頁 |
| 文件大?。?/td> | 873K |
| 代理商： | ADV7181BCP |
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ADV7181B
Rev. 0 | Page 83 of 96
Bits
4
0
0
1
1
0
0
1
1
Subaddress
0x51
Register
Lock Count
Bit Description
CIL[2:0]. Count-into-lock determines
the number of lines the system must
remain in lock before showing a
locked status.
7
6
0
5
0
0
0
0
1
1
1
1
3
0
1
0
1
0
1
0
1
2
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
Comments
1 line of video
2 lines of video
5 lines of video
10 lines of video
100 lines of video
500 lines of video
1000 lines of video
100000 lines of video
1 line of video
2 lines of video
5 lines of video
10 lines of video
100 lines of video
500 lines of video
1000 lines of video
100000 lines of video
Over field with vertical
info
Line-to-line evaluation
Lock status set only by
horizontal lock
Lock status set by
horizontal lock and
subcarrier lock.
Set to default
LLC1 (nominal 27 MHz)
selected out on LLC1 pin
LLC2 (nominally 13.5 MHz)
selected out on LLC1 pin
Set to default
No WSS detected
WSS detected
No CCAP signals detected
CCAP sequence detected
No EDTV sequence
detected
EDTV sequence detected
No CGMS transition
detected
CGMS sequence decoded
Notes
COL[2:0]. Count-out-of-lock
determines the number of lines the
system must remain out-of-lock
before showing a lost-locked status.
SRLS. Select raw lock signal. Selects
the determination of the lock.
Status.
0
1
FSCLE. Fsc lock enable.
1
Reserved
LLC_PAD_SEL [2:0]. Enables manual
selection of clock for LLC1 pin.
0
0
0
0
0
0
0
1
0
1
For 16-bit 4:2:2 out,
OF_SEL[3:0] = 0010
Read-only status
bits
0x8F
Free Run
Line
Length 1
Reserved
WSSD. Screen signaling detected.
0
0
0
1
0
1
CCAPD. Closed caption data.
EDTVD. EDTV sequence
0
1
CGMSD. CGMS sequence
x
x
x
x
x
x
x
x
1
x
x
x
x
0x90
VBI Info
(Read
Only)
Reserved
WSS1[7:0]
Wide screen signaling data.
WSS2[7:0]
Wide screen signaling data.
EDTV1[7:0]
EDTV data register.
EDTV2[7:0]
EDTV data register.
EDTV3[7:0]
EDTV data register.
CGMS1[7:0]
CGMS data register.
CGMS2[7:0]
CGMS data register.
CGMS3[7:0]
CGMS data register.
0x91
WSS1
(Read Only)
WSS2
(Read Only)
EDTV1
(Read Only)
EDTV2
(Read Only)
EDTV3
(Read Only)
CGMS1
(Read Only)
CGMS2
(Read Only)
CGMS3
(Read Only)
0x92
x
x
x
x
x
x
x
x
WSS2[7:6] are
undetermined
0x93
x
x
x
x
x
x
x
x
0x94
x
x
x
x
x
x
x
x
0x95
x
x
x
x
x
x
x
x
EDTV3[7:6] are
undetermined
EDTV3[5] is reserved
for future use
0x96
x
x
x
x
x
x
x
x
0x97
x
x
x
x
x
x
x
x
0x98
x
x
x
x
x
x
x
x
CGMS3[7:4] are
undetermined
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7181BST | Multiformat SDTV Video Decoder |
| ADV7183B | Multiformat SDTV Video Decoder |
| ADV7183BBSTZ | Multiformat SDTV Video Decoder |
| ADV7183BKSTZ | Multiformat SDTV Video Decoder |
| ADV7183KST | Advanced Video Decoder with 10-Bit ADC and Component Input Support |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7181BCPZ | 制造商:Analog Devices 功能描述: |
| ADV7181BST | 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:9-BIT BIT NTSC/PAL/SECAM VIDEO DECODER - Bulk 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7181C | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, Integrated, Multiformat SDTV Video Decoder and RGB Graphics Digitizer |
| ADV7181CBCPZ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADV7181CBCPZ-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, Integrated, Multiformat SDTV Video Decoder and RGB Graphics Digitizer |
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