欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號： ADV7301A
廠商： Analog Devices, Inc.
英文描述： Multiformat SD, Progressive Scan/HDTV Video Encoder with Six NSV⑩ 12-Bit DACs
中文描述： 多格式統(tǒng)計，逐行掃描/ HDTV視頻編碼器與六噪聲整形⑩12位DAC
文件頁數(shù)： 51/68頁
文件大小： 1544K
代理商： ADV7301A
REV. A
ADV7300A/ADV7301A
–51–
well as minimizing reflections, short analog output traces will
reduce noise pickup due to neighboring digital circuitry.
To avoid crosstalk between the DAC outputs, it is recommended
to leave as much space as possible between the tracks of the
individual DAC output pins.
Supply Decoupling
Noise on the analog power plane can be further reduced by the
use of decoupling capacitors. Optimum performance is achieved
by the use of 0.1
μ
F ceramic capacitors. Each of the group of
V
AA
, V
DD
, or V
DD_IO
pins should be individually decoupled to
ground. This should be done by placing the capacitors as close
as possible to the device with the capacitor leads as short as
possible, thus minimizing lead inductance.
Digital Signal Interconnect
The digital signal lines should be isolated as much as possible
from the analog outputs and other analog circuitry. Digital
signal lines should not overlay the analog power plane. Due to
the high clock rates used, long clock lines to the ADV7300A/
ADV7301A should be avoided to minimize noise pickup. Any
active pull-up termination resistors for the digital inputs should
be connected to the digital power plane and not the analog
power plane.
Analog Signal Interconnect
The ADV7300A/ADV7301A should be located as close as pos-
sible to the output connectors, thus minimizing noise pickup
and reflections due to impedance mismatch. For optimum per-
formance, the analog outputs should each be source and load
terminated, as shown in Figure 79. The termination resistors
should be as close as possible to the ADV7300A/ADV7301A to
minimize reflections.
Any unused inputs should be tied to ground.
S_HSYNC
S0–S9
S_VSYNC
S BLANK
C0–C9
Y0–Y9
P_HSYNC
P_VSYNC
P_BLANK
RESET
CLKIN_B
CLKIN_A
EXT_LF
GND_IO AGND DGND
R
SET2
R
SET1
ALSB
I
2
C
SCLK
DAC F
DAC E
DAC D
DAC C
DAC B
DAC A
V
REF
V
DD_IO
V
DD
V
AA
COMP2
COMP1
150
150
150
150
SDA
11, 57
760
760
5k
V
DD_IO
5k
V
DD_IO
5k
V
DD_IO
HD Pr/RED
5k
V
DD_IO
HD Pb/BLUE
HD Y/GREEN
SD CHROMA/RED/V
SD LUMA/BLUE/U
SD CVBS/GREEN/Y
3.9nF
680R
820pF
V
AA
4.7 F
6.3V
150
V
AA
UNUSED INPUTS SHOULD BE GROUNDED
47k
V
AA
V
AA
0.1 F
0.1 F
0.1 F
V
AA
0.1 F
10nF
0.1 F
10nF
10nF
10, 56
V
DD_IO
V
DD
I
2
C
BUS
ADV7300A/
ADV7301A
POWER SUPPLY DECOUPLING FOR
EACH POWER SUPPLY GROUP
150
Figure 79. Circuit Layout
相關PDF資料
PDF描述
ADV7301AKST Multiformat SD, Progressive Scan/HDTV Video Encoder with Six NSV⑩ 12-Bit DACs
ADV7302A 32X2 SHROUDED VERT. HDR
ADV7302AKST Sand Paper; Abrasive Grade:A VFN; Color:Maroon; Pack Quantity:6; Roll Length:30ft; Width:2"
ADV7303A Sand Paper; Abrasive Grade:A VFN; Color:Maroon; Pack Quantity:4; Roll Length:30ft; Width:3"
ADV7303AKST Sand Paper; Abrasive Grade:T; Color:White; Pack Quantity:3; Roll Length:30ft; Width:4"
相關代理商/技術參數(shù)
參數(shù)描述
ADV7301AKST 功能描述:IC DAC VIDEO HDTV 6-12BIT 64LQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV73025702 制造商:LG Corporation 功能描述:Frame Assembly
ADV73025801 制造商:LG Corporation 功能描述:Frame Assembly
ADV73025809 制造商:LG Corporation 功能描述:Frame Assembly
ADV7302A 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SD, Progressive Scan/HDTV Video Encoder with Six 11-Bit DACs
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*
主站蜘蛛池模板： 柳河县| 龙井市| 肇庆市| 怀远县| 邛崃市| 罗山县| 邵阳市| 乐亭县| 咸阳市| 通许县| 大宁县| 滕州市| 大港区| 池州市| 山阳县| 伊宁县| 望都县| 台东市| 安吉县| 大渡口区| 东丽区| 四子王旗| 建阳市| 河源市| 惠东县| 桂阳县| 桂东县| 汨罗市| 长丰县| 资兴市| 化州市| 潍坊市| 华安县| 宁安市| 饶河县| 金塔县| 宜宾县| 东港市| 普格县| 五寨县| 泾阳县|