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參數資料
| 型號： | ADV7392EBZ |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| 中文描述： | 低功耗，芯片尺寸10位標清/高清視頻編碼器 |
| 文件頁數： | 62/96頁 |
| 文件大小： | 1209K |
| 代理商： | ADV7392EBZ |
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ADV7390/ADV7391/ADV7392/ADV7393
PRINTED CIRCUIT BOARD LAYOUT AND DESIGN
DAC CONFIGURATIONS
The ADV739x contains three DACs. All three DACs can be
configured to operate in full-drive mode. Full-drive mode is
defined as 34.7 mA full-scale current into a 37.5 Ω load, R
L
.
Full-drive is the recommended mode of operation for the DACs.
Alternatively, all three DACs can be configured to operate in low
drive mode. Low drive mode is defined as 4.33 mA full-scale
current into a 300 Ω load, R
L
.
The ADV739x contains a R
SET
pin. A resistor connected between
the R
SET
pin and AGND is used to control the full-scale output
current and, therefore, the output voltage levels of DAC 1, DAC 2,
and DAC 3. For full-drive operation, R
SET
must have a value
of 510 Ω and RL must have a value of 37.5 Ω. For low drive
operation, R
SET
must have a value of 4.12 kΩ, and R
L
must have
a value of 300 Ω.
The resistor connected to the R
SET
pin should have a 1%
tolerance.
The ADV739x contains a compensation pin, COMP. A 2.2 nF
compensation capacitor should be connected from the COMP
pin to V
AA
.
VIDEO OUTPUT BUFFER AND OPTIONAL
OUTPUT FILTER
An output buffer is necessary on any DAC that operates in low
drive mode (R
SET
= 4.12 kΩ, R
L
= 300 Ω). Analog Devices Inc.
produces a range of op amps suitable for this application, for
example, the
AD8061
. For more information about line driver
buffering circuits, see the relevant op amp data sheet.
An optional reconstruction (anti-imaging) low-pass filter (LPF)
may be required on the ADV739x DAC outputs. The filter
specifications vary with the application. The use of 16× (SD),
8× (ED), or 4× (HD) oversampling can remove the requirement
for a reconstruction filter altogether.
For applications requiring an output buffer and reconstruction
filter, the
ADA4430-1
and
ADA4411-3
integrated video filter
buffers should be considered.
Rev. 0 | Page 62 of 96
Table 52. ADV739x Output Rates
Input Mode
(0x01, Bits[6:4])
SD
Oversampling
Off
On
On
Off
On
On
Off
On
On
Output Rate (MHz)
27
108
216
27
108
216
74.25
148.5
297
(2×)
(8×)
(16×)
(1×)
(4×)
(8×)
(1×)
(2×)
(4×)
ED
HD
Table 53. Output Filter Requirements
Application
SD
Oversampling
2×
8×
16×
1×
4×
8×
1×
2×
4×
Cutoff
Frequency
(MHz)
> 6.5
> 6.5
> 6.5
> 12.5
> 12.5
> 12.5
> 30
> 30
> 30
Attenuation
–50 dB @
(MHz)
20.5
101.5
209.5
14.5
95.5
203.5
44.25
118.5
267
ED
HD
560
600
22pF
600
DAC
OUTPUT
75
BNC
OUTPUT
10μH
560
3
4
1
0
Figure 86. Example of Output Filter for SD, 16× Oversampling
560
6.8pF
600
6.8pF
600
DAC
OUTPUT
75
BNC
OUTPUT
4.7μH
560
3
4
1
0
Figure 87. Example of Output Filter for ED, 8× Oversampling
DAC
OUTPUT
390nH
33pF
33pF
75
500
300
75
BNC
OUTPUT
500
3
4
1
3
4
1
0
Figure 88. Example of Output Filter for HD, 4× Oversampling
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|---|---|
| ADV7393 | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7393BCPZ | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7393BCPZ-REEL | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7393EBZ | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7392WBCPZ | 制造商:Analog Devices 功能描述: |
| ADV7392WBCPZ-REEL | 制造商:Analog Devices 功能描述: |
| ADV7393 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7393BCPZ | 功能描述:IC DAC VIDEO HDTV 10BIT 40LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統 電壓 - 電源，模擬:- 電壓 - 電源，數字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7393BCPZ-REEL | 功能描述:IC DAC ENCODER VID HDTV 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統 電壓 - 電源，模擬:- 電壓 - 電源，數字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
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