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參數資料
| 型號： | ADVFC32SH |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬專用變換器 |
| 英文描述： | Voltage-to-Frequency and Frequency-to-Voltage Converter |
| 中文描述： | VOLTAGE-FREQUENCY CONVERTER, 0.5 MHz, MBCY10 |
| 封裝： | TO-100, 10 PIN |
| 文件頁數： | 2/6頁 |
| 文件大小： | 141K |
| 代理商： | ADVFC32SH |
REV. A
–2–
ADVFC32–SPECIFICATIONS
(typical @ +25
8
C wth V
S
=
6
15 V unless otherwse noted)
Specifications shown in
boldface
are tested on all production units at
final electrical test. Results from those tests are used to calculate
outgoing quality levels. All min and max specifications are guaranteed,
although only those shown in boldface are tested on all production units.
ADVFC32K
T yp
ADVFC32B
T yp
ADVFC32S
T yp
Model
Min
Max
Min
Max
Min
Max
Units
DYNAMIC PERFORMANCE
Full Scale Frequency Range
Nonlinearity
f
MAX
= 10 kHz
f
MAX
= 100 kHz
f
= 0.5 MHz
Full-Scale Calibration Error
(Adjustable to Zero)
vs. Supply
(Full Scale Frequency = 100 kHz)
vs. T emperature
(Full Scale Frequency = 10 kHz)
0
500
0
500
0
500
kHz
–0.01
–0.05
–0.20
±
0.01
+0.05
+0.20
–0.01
–0.05
–0.20
+0.01
+0.05
+0.20
–0.01
–0.05
–0.20
+0.01
+0.05
+0.20
%
%
%
±
0.05
±
0.05
±
0.05
±
5
±
5
±
5
%
–0.015
+0.015
–0.015
+0.015
–0.015
+0.015
% of FSR%
±
75
–100
+100
+150
+150
ppm/
°
C
DYNAMIC RESPONSE
Maximum Settling T ime for Full Scale
Step Input
Overload Recovery T ime
1 Pulse of New Frequency Plus 1
μ
s
1 Pulse of New Frequency Plus 1
μ
s
1 Pulse of New Frequency Plus 1
μ
s
1 Pulse of New Frequency Plus 1
μ
s
1 Pulse of New Frequency Plus 1
μ
s
1 Pulse of New Frequency Plus 1
μ
s
ANALOG INPUT AMPLIFIER
(V/F Conversion)
Current Input Range
Voltage Input Range
0
0
+0.25
–10
0.25
×
R
IN3
0
0
+0.25
–10
0.25
×
R
IN3
0
0
+0.25
–10
0.25
×
R
IN3
mA
V
2
mA
Differential Impedance
Common-Mode Impedance
Input Bias Current
Noninverting Input
Inverting Input
Input Offset Voltage
(T rimmable to Zero)
2, 3
vs. T emperature (T
MIN
to T
MAX
)
Safe Input Voltage
300 k
||
10 pF
300 M
||
3 pF
2 M
||
10 pF
750 M
||
3 pF
300 k
||
10 pF
300 M
||
3 pF
2 M
||
10 pF
750 M
||
10 pF
300 k
||
10 pF
300 M
||
3 pF
2 M
||
10 pF
750 M
||
10 pF
40
±
8
250
+100
40
±
8
250
+100
40
±
8
250
+100
nA
nA
–100
–100
–100
4
30
4
30
4
30
mV
μ
V/
°
C
±
V
S
±
V
S
±
V
S
COMPARAT OR (F/V Conversion)
Logic “0” Level
Logic “1” Level
Pulse Width Range
4
Input Impedance
–V
S
+1
0.1
50 k
||
10 pF
–0.6
+V
S
0.15/f
MAX
–V
S
+1
0.1
50 k
||
10 pF
–0.6
+V
S
0.15/f
MAX
–V
S
+1
0.1
50 k
||
10 pF
–0.6
+V
S
0.15/f
MAX
V
V
μ
s
250 k
250 k
250 k
OPEN COLLECT OR OUT PUT
(V/F Conversion)
Output Voltage in Logic “0”
I
= 8 mA
Output Leakage Current in Logic “1”
Voltage Range
Fall T imes (Load = 500 pF and
I
SINK
= 5 mA)
0.4
1
+30
0.4
1
+30
0.4
1
+30
V
μ
A
V
0
0
0
400
400
400
ns
AMPLIFIER OUT PUT (F/V Conversion)
Voltage Range (0 mA
≤
I
O
≤
7 mA)
Source Current (0
≤
V
O
≤
7 V)
Capacitive Load (Without Oscillation)
Closed Loop Output Impedance
0
10
+10
0
10
+10
0
10
+10
V
mA
pF
100
1
100
1
100
1
POWER SUPPLY
Rated Voltage
Voltage Range
Quiescent Current
±
15
±
15
±
15
V
V
mA
±
9
±
18
8
±
9
±
18
8
±
9
±
18
8
6
6
6
T EMPERAT URE RANGE
Specified Range
Operating Range
Storage
0
–25
–25
+70
+85
+85
–25
–55
–65
+85
+125
+150
–55
–55
–65
+125
+125
+150
°
C
°
C
°
C
PACK AGE OPT IONS
Plastic DIP (N-14)
T O–100 (H-10A)
ADVFC32K N
ADVFC32BH
ADVFC32SH
NOT ES
1
Nonlinearity defined as deviation from a straight line from zero to full scale, expressed as a percentage of full scale.
2
See Figure 3.
3
See Figure 1.
4
f
MAX
expressed in units of MHz.
Specifications subject to change without notice.
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