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參數資料
| 型號： | AGR18125EU |
| 廠商： | TRIQUINT SEMICONDUCTOR INC |
| 元件分類： | 功率晶體管 |
| 英文描述： | L BAND, Si, N-CHANNEL, RF POWER, MOSFET |
| 文件頁數： | 1/6頁 |
| 文件大小： | 355K |
| 代理商： | AGR18125EU |
Product Brief
Agere Systems - Proprietary
AGR18125E
125 W, 1.805 GHz—1.880 GHz, LDMOS RF Power Transistor
Introduction
The AGR18125E is a 125 W, 26 V, N-channel gold-
metallized, laterally diffused metal oxide semicon-
ductor (LDMOS) RF power field effect transistor
(FET) suitable for global system for mobile communi-
cation (GSM), enhanced data for global evolution
(EDGE), and multicarrier class AB power amplifier
applications. This device is manufactured using
advanced LDMOS technology offering state-of-the-
art performance and reliability. It is packaged in an
industry-standard package and is capable of deliver-
ing a minimum output power of 125 W which makes
it ideally suited for today’s RF power amplifier appli-
cations.
Figure 1. Available Packages
Features
Typical performance ratings for GSM EDGE
(f = 1.840 GHz, POUT = 50 W)
— Modulation spectrum:
@ ± 400 kHz = –60 dBc.
@ ± 600 kHz = –72 dBc.
Typical performance over entire digital communi-
cation system (DCS) band:
— P1dB: 125 W typical (typ).
— Power gain: @ P1dB = 13.5 dB.
— Efficiency: @ P1dB = 50% typ.
— Return loss: –10 dB.
High-reliability, gold-metallization process.
Low hot carrier injection (HCI) induced bias drift
over 20 years.
Internally matched.
High gain, efficiency, and linearity.
Integrated ESD protection.
125 W minimum output power.
Device can withstand 10:1 voltage standing wave
ratio (VSWR) at 28 Vdc, 1.840 GHz, 125 W contin-
uous wave (CW) output power.
Large signal impedance parameters available.
Table 1. Thermal Characteristics
Table 2. Absolute Maximum Ratings
*
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating
*
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
AGR18125EU (unflanged)
AGR18125EF (flanged)
)
5B 03 STYLE 1
Parameter
Sym
Value
Unit
Thermal Resistance,
Junction to Case:
AGR18125EU
AGR18125EF
R JC
0.5
°C/W
Parameter
Sym
Value
Unit
Drain-source Voltage
VDSS
65
Vdc
Gate-source Voltage
VGS –0.5, 15 Vdc
Total Dissipation at TC = 25 °C:
AGR18125EU
AGR18125EF
PD
350
W
Derate Above 25 °C:
AGR18125EU
AGR18125EF
—
2.0
W/°C
Operating Junction Tempera-
ture
TJ
200
°C
Storage Temperature Range TSTG –65, 150 °C
AGR18125E
Minimum (V)
Class
HBM
500
1B
MM
50
A
CDM
1500
4
PEAK Devices
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