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參數資料
| 型號： | AOI472A |
| 廠商： | ALPHA AND OMEGA SEMICONDUCTOR |
| 元件分類： | JFETs |
| 英文描述： | 50 A, 25 V, 0.0052 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-251 |
| 封裝： | GREEN, TO-251A, IPAK-3 |
| 文件頁數： | 2/7頁 |
| 文件大小： | 158K |
| 代理商： | AOI472A |
AOI472A
Symbol
Min
Typ
Max
Units
BVDSS
25
V
VDS=25V, VGS=0V
10
TJ=55°C
50
IGSS
100
nA
VGS(th)
Gate Threshold Voltage
1.2
2
2.5
V
ID(ON)
100
A
4.3
5.2
TJ=125°C
6.2
7.4
8
9.5
m
gFS
65
S
VSD
0.7
1
V
IS
50
A
Ciss
1500
1800
2200
pF
Coss
340
445
580
pF
Crss
200
285
400
pF
Rg
1.1
1.6
2.4
Qg(10V)
25
31
40
nC
Qg(4.5V)
12
15
20
nC
Qgs
3.5
4.8
7
nC
Qgd
6.5
8.9
13
nC
tD(on)
8ns
tr
10.4
ns
tD(off)
29
ns
tf
9ns
trr
9.5
12
15
ns
Qrr
17
21
26
nC
Repetitive avalanche energy L=50uH
C
Rev0 : Dec-08
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Charge IF=30A, dI/dt=500A/s
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
Turn-Off DelayTime
VGS=10V, VDS=12.5V,
RL=0.42, RGEN=3
Gate resistance
VGS=0V, VDS=0V, f=1MHz
Turn-Off Fall Time
Total Gate Charge
VGS=10V, VDS=12.5V, ID=30A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
m
IS=1A,VGS=0V
VDS=5V, ID=30A
VGS=4.5V, ID=20A
Forward Transconductance
Diode Forward Voltage
RDS(ON)
Static Drain-Source On-Resistance
IDSS
A
VDS=VGS ID=250A
VDS=0V, VGS= ±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Electrical Characteristics (TJ=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter
Conditions
Body Diode Reverse Recovery Time
Drain-Source Breakdown Voltage
On state drain current
ID=250A, VGS=0V
VGS=10V, VDS=5V
VGS=10V, ID=30A
Reverse Transfer Capacitance
IF=30A, dI/dt=500A/s
VGS=0V, VDS=12.5V, f=1MHz
SWITCHING PARAMETERS
A. The value of RθJA is measured with the device mounted on 1in
2 FR-4 board with 2oz. Copper, in a still air environment with T
A =25°C. The Power
dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the
user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in
2 FR-4 board with 2oz. Copper, in a still air environment with T
A=25°C.
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
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