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參數資料
型號: AS4LC1M16E5-60TI
廠商: Electronic Theatre Controls, Inc.
英文描述: 3V 1M X 6 CMOS DRAM (EDO)
中文描述: 3V的100萬× 6的CMOS的DRAM(江戶)
文件頁數: 3/22頁
文件大小: 604K
代理商: AS4LC1M16E5-60TI
AS4LC1M16E5
4/11/01
Alliance Semiconductor
3
Absolute maximum ratings
Parameter
Truth table
Symbol
Min
Max
Unit
Input voltage
V
DQ
V
CC
T
STG
T
SOLDER
P
D
I
out
-1.0
+5.5
V
Power supply voltage
-1.0
+4.0
V
Storage temperature (plastic)
-65
+150
°C
o
C
×
sec
Soldering temperature
×
time
260
×
10
Power dissipation
0.6
W
Short circuit output current
50
mA
Operation
RAS
LCAS
UCAS
WE
OE
Addresses
DQ0 to DQ15
Notes
t
R
X
t
C
X
Standby
H
H to X
H to X
X
X
High-Z
Word read
L
L
L
H
L
ROW
COL
Data out
Lower byte
read
L
L
H
H
L
ROW
COL
Lower byte,
Upper byte, Data out
Upper byte
read
L
H
L
H
L
ROW
COL
Lower byte,
Data out, Upper byte
Word
(early) write
L
L
L
L
X
ROW
COL
Data in
Lower byte
(early) write
L
L
H
L
X
ROW
COL
Lower byte, Data in,
Upper byte, High-Z
Upper byte
(early) write
L
H
L
L
X
ROW
COL
Lower byte, High-Z,
Upper byte, Data in
Read write
L
L
L
H to L
L to H
ROW
COL
Data out, Data in
1,2
EDO read
1st cycle
L
H to L
H to L
H
L
ROW
COL
Data out
2
2nd cycle
L
H to L
H to L
H
L
n/a
COL
Data out
2
Any cycle
L
L to H
L to H
H
L
n/a
n/a
Data out
2
EDO write
1st cycle
L
H to L
H to L
L
X
ROW
COL
Data in
1
2nd cycle
L
H to L
H to L
L
X
n/a
COL
Data in
1
EDO
read write
1st cycle
L
H to L
H to L
H to L
L to H
ROW
COL
Data out, Data in
1,2
2nd cycle
L
H to L
H to L
H to L
L to H
n/a
COL
Data out, Data in
1,2
RAS only
refresh
L
H
H
X
X
ROW
n/a
High Z
CBR refresh
H to L
L
L
H
X
X
X
High Z
3
Self refresh
H to L
L
L
H
X
X
X
High Z
3
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