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| 型號(hào)： | ATA8743-PXQW |
| 廠商： | Atmel |
| 文件頁(yè)數(shù)： | 52/238頁(yè) |
| 文件大小： | 3971K |
| 描述： | MCU W/TRANSMITTER ASK/FSK 24QFN |
| 產(chǎn)品培訓(xùn)模塊： | MCU Product Line Introduction |
| 標(biāo)準(zhǔn)包裝： | 6,000 |
| 頻率： | 868MHz ~ 928MHz |
| 應(yīng)用： | 家庭自動(dòng)化，遙感，RKE |
| 調(diào)制或協(xié)議： | ASK，F(xiàn)SK |
| 數(shù)據(jù)傳輸率 - 最大： | 32 kBit/s |
| 功率 - 輸出： | 3.5dBm ~ 8dBm |
| 電流 - 傳輸： | 9.3mA |
| 數(shù)據(jù)接口： | PCB，表面貼裝 |
| 天線連接器： | PCB，表面貼裝 |
| 存儲(chǔ)容量： | 4kB 閃存，256B EEPROM，256B SRAM |
| 電源電壓： | 1.8 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 24-VQFN 裸露焊盤(pán) |
| 包裝： | 帶卷 (TR) |
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52
9152BINDCO02/10
ATA8743
15.7 Minimizing Power Consumption
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the devices functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption.
15.7.1
Analog to Digital Converter
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. See Analog to Digital Converter on page 154 for
details on ADC operation.
15.7.2
Analog Comparator
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep
modes, the Analog Comparator is automatically disabled. However, if the Analog Comparator is
set up to use the Internal Voltage Reference as input, the Analog Comparator should be dis-
abled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled,
independent of sleep mode. See Analog Comparator on page 150 for details on how to config-
ure the Analog Comparator.
15.7.3
Brown-out Detector
If the Brown-out Detector is not needed in the application, this module should be turned off. If the
Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep modes,
and hence, always consume power. In the deeper sleep modes, this will contribute significantly
to the total current consumption. See Brown-out Detection on page 59 for details on how to
configure the Brown-out Detector.
15.7.4
Internal Voltage Reference
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. When
turned on again, the user must allow the reference to start up before the output is used. If the
reference is kept on in sleep mode, the output can be used immediately. See Internal Voltage
Reference on page 60 for details on the start-up time.
15.7.5
Watchdog Timer
If the Watchdog Timer is not needed in the application, this module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. See Watchdog Timer on page 60 for details on how to configure the Watchdog Timer.
15.7.6
Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important thing is then to ensure that no pins drive resistive loads. In sleep modes where
both the I/O clock (clk
I/O
) and the ADC clock (clk
ADC
) are stopped, the input buffers of the device
will be disabled. This ensures that no power is consumed by the input logic when not needed. In
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