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參數資料
| 型號： | CAT706TZI-G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | 3 X 3 MM, HALOGEN FREE AND ROHS COMPLIANT, MO-187, MSOP-8 |
| 文件頁數： | 10/12頁 |
| 文件大小： | 133K |
| 代理商： | CAT706TZI-G |
CAT705, CAT706, CAT813
http://onsemi.com
7
WATCHDOG TIMER
The CAT705, CAT706, & CAT813 provide a Watchdog
input (WDI). The watchdog timer function controls the
watchdog output (WDO) signal and forces the WDO to be
low (active) when the WDI input does not have a transition
from lowtohigh or hightolow within 1.6 s typical. If a
transition occurs on the WDI input pin prior to the watchdog
timeout, the watchdog timer is restarted. The timing
diagram is shown in Figure 6. The watchdog timer starts as
soon as reset condition becomes inactive.
When the VCC supply drops below the reset threshold, the
WDO output becomes active and goes low independently of
the watchdog timing stage.
Figure 7 below shows a typical implementation of a
watchdog function. Any processor signal that repeats
dependant on the normal operation of the processor or
directed by the software operating on the processor can be
used to strobe the watchdog input. The most reliable is a
dedicated I/O output transitioned by a specific software
instruction.
The watchdog can be disabled by floating (or tristating)
the WDI input (see Figure 8). If the watchdog is disabled the
WDI pin will be pulled low for the first 7/8th’s of the
watchdog period (tWD) and pulled high for the last 1/8th of
the watchdog period. This pulling low of the WDI input and
then high is used to detect an open or tristate condition and
will continue to repeat until the WDI input is driven high or
low.
For most efficient operation of devices with the watchdog
function the WDI input should be held low the majority of
the time and only strobed high as required to reset the
watchdog timer.
(RESET)
(() Are for CAT813 Only)
WDI
+5 V
0 V
+5 V
0 V
+5 V
0 V
+5 V
0 V
Figure 6. Watchdog Timing Diagram
tRS
tWD
tWDSU
tWP
RESET
WDO
RESET EXTERNALLY
TRIGGERED BY MR
PIC
DECODER
ADDRESS
WDI
GND
PFI
CAT705
CAT706
CAT813
Figure 7. Watchdog Timer Circuit
MCLR
mC
VCC
PFO
MR
WDO
RESET/RESET
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CAT706TZI-GT3 | 功能描述:監(jiān)控電路 4.4V Pull Low RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數: 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT706VGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT706VI-G | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:レP Supervisory Circuits |
| CAT706VI-GT3 | 功能描述:監(jiān)控電路 MPU SUPR CIRCUIT RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數: 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT706ZGI | 制造商:Catalyst Semiconductor 功能描述: |
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