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參數資料
| 型號： | CD54HC4024F3A |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | High-Speed CMOS Logic 7-Stage Binary Ripple Counter |
| 中文描述： | 高速CMOS邏輯7級二進制紋波計數器 |
| 文件頁數： | 1/11頁 |
| 文件大小： | 283K |
| 代理商： | CD54HC4024F3A |
1
Data sheet acquired from Harris Semiconductor
SCHS202C
Features
Fully Static Operation
Buffered Inputs
Common Reset
Negative Edge Clocking
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤
1
μ
A at V
OL
, V
OH
Description
The ’HC4024 and ’HCT4024 are 7-stage ripple-carry binary
counters. All counter stages are master-slave flip-flops. The
state of the stage advances one count on the negative
transition of each input pulse; a high voltage level on the MR
line resets all counters to their zero state. All inputs and
outputs are buffered.
Pinout
CD54HC4024, CD54HCT4024
(CERDIP)
CD74HC4024
(PDIP, SOIC, TSSOP)
CD74HCT4024
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
CD54HC4024F3A
-55 to 125
14 Ld CERDIP
CD54HCT4024F3A
-55 to 125
14 Ld CERDIP
CD74HC4024E
-55 to 125
14 Ld PDIP
CD74HC4024M
-55 to 125
14 Ld SOIC
CD74HC4024MT
-55 to 125
14 Ld SOIC
CD74HC4024M96
-55 to 125
14 Ld SOIC
CD74HC4024PW
-55 to 125
14 Ld TSSOP
CD74HC4024PWR
-55 to 125
14 Ld TSSOP
CD74HC4024PWT
-55 to 125
14 Ld TSSOP
CD74HCT4024E
-55 to 125
14 Ld PDIP
CD74HCT4024M
-55 to 125
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CP
MR
Q
7
Q
6
Q
5
Q
4
GND
V
CC
NC
Q
1
’
Q
2
NC
Q
3
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
November 1997 - Revised October 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
2003, Texas Instruments Incorporated
CD54HC4024, CD74HC4024,
CD54HCT4024, CD74HCT4024
High-Speed CMOS Logic
7-Stage Binary Ripple Counter
[ /Title
(CD74
HC402
4,
CD74
HCT40
24)
/Sub-
ject
(High
Speed
CMOS
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